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Improve verilator compilation speed
author
Dolu1990
<charles.papon.90@gmail.com>
Tue, 30 Jun 2020 08:38:26 +0000
(10:38 +0200)
committer
GitHub
<noreply@github.com>
Tue, 30 Jun 2020 08:38:26 +0000
(10:38 +0200)
by asking verilator to split the C++ model into multiple files.
litex/build/sim/core/Makefile
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diff --git
a/litex/build/sim/core/Makefile
b/litex/build/sim/core/Makefile
index 5615fe3d3a603078e8483e42498cfb29603f0351..f14398248a6ec8bdd18db1bc839e81aab74decc9 100644
(file)
--- a/
litex/build/sim/core/Makefile
+++ b/
litex/build/sim/core/Makefile
@@
-45,6
+45,9
@@
sim: $(OBJS_SIM) | mkdir
$(if $(TRACE_FST), --trace-fst,) \
$(if $(COVERAGE), --coverage,) \
--unroll-count 256 \
+ --output-split 5000 \
+ --output-split-cfuncs 500 \
+ --output-split-ctrace 500 \
$(INC_DIR) \
-Wno-BLKANDNBLK \
-Wno-WIDTH