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Make sure only real bits of pstate can be set.
author
Gabe Black
<gblack@eecs.umich.edu>
Mon, 20 Nov 2006 23:08:50 +0000
(18:08 -0500)
committer
Gabe Black
<gblack@eecs.umich.edu>
Mon, 20 Nov 2006 23:08:50 +0000
(18:08 -0500)
--HG--
extra : convert_revision :
8707bbed2aeb80613f86503e92b63853767adaa9
src/arch/sparc/miscregfile.cc
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diff --git
a/src/arch/sparc/miscregfile.cc
b/src/arch/sparc/miscregfile.cc
index 8ca3d66f9970ef94457b2c2f974e96de9d118d65..a60288984f4f10012cf493ae5cdc07d9ec1edba5 100644
(file)
--- a/
src/arch/sparc/miscregfile.cc
+++ b/
src/arch/sparc/miscregfile.cc
@@
-62,6
+62,11
@@
string SparcISA::getMiscRegName(RegIndex index)
return miscRegName[index];
}
+enum RegMask
+{
+ PSTATE_MASK = (((1 << 4) - 1) << 1) | (((1 << 4) - 1) << 6) | (1 << 12)
+};
+
void MiscRegFile::reset()
{
y = 0;
@@
-275,7
+280,7
@@
void MiscRegFile::setReg(int miscReg, const MiscReg &val)
tba = val & ULL(~0x7FFF);
break;
case MISCREG_PSTATE:
- pstate =
val
;
+ pstate =
(val & PSTATE_MASK)
;
break;
case MISCREG_TL:
tl = val;
@@
-377,7
+382,7
@@
void MiscRegFile::setRegWithEffect(int miscReg,
//Set up performance counting based on pcr value
break;
case MISCREG_PSTATE:
- pstate = val;
+ pstate = val
& PSTATE_MASK
;
setImplicitAsis();
return;
case MISCREG_TL: