* simops.c: Fix "rol" and "ror".

Something I noticed while working on the mn10200.

diff --git a/sim/mn10300/ChangeLog b/sim/mn10300/ChangeLog
index e871835a210eff3bf7859674c793402d96174ab8..8a488e6deebd6791bd67b34eeb011d5cfe34d5bd 100644 (file)
--- a/sim/mn10300/ChangeLog
+++ b/sim/mn10300/ChangeLog
@@ -1,3 +1,11 @@
+Thu Jan 16 11:28:14 1997  Jeffrey A Law  (law@cygnus.com)
+
+       * simops.c: Fix "rol" and "ror".
+
+Wed Jan 15 06:45:58 1997  Jeffrey A Law  (law@cygnus.com)
+
+       * simops.c: Fix typo in last change.
+
 Mon Jan 13 13:22:35 1997  Jeffrey A Law  (law@cygnus.com)
 
        * simops.c: Use REG macros in few places not using them yet.

diff --git a/sim/mn10300/simops.c b/sim/mn10300/simops.c
index caa2d75136e5ab3e4df763314f09a901501987d8..26146a159af1d1235ec3452fdfea70db8d7d7477 100644 (file)
--- a/sim/mn10300/simops.c
+++ b/sim/mn10300/simops.c
@@ -2219,7 +2219,7 @@ void OP_F284 (insn, extension)
   c = (value & 0x1);
 
   value >>= 1;
-  value |= ((PSW & PSW_C) != 0) ? 0x80000000 : 0;
+  value |= (c) ? 0x80000000 : 0;
   State.regs[REG_D0 + REG0 (insn)] = value;
   z = (value == 0);
   n = (value & 0x80000000) != 0;
@@ -2238,7 +2238,7 @@ void OP_F280 (insn, extension)
   c = (value & 0x80000000) ? 1 : 0;
 
   value <<= 1;
-  value |= ((PSW & PSW_C) != 0);
+  value |= c;
   State.regs[REG_D0 + REG0 (insn)] = value;
   z = (value == 0);
   n = (value & 0x80000000) != 0;