re PR target/19350 (Compilation with -O1 -ftree-vectorize gives unrecognizable insn...

        PR target/19350
        * config/i386/i386.c (ix86_expand_vector_move_misalign): Convert
        to V4SFmode in SSE1 fallback load path.

From-SVN: r93957

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fbeebb03165d94b14d2944fb4ebae44b8f60280f..644d216761302822a6490c96ab5540019ab29cb7 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2005-01-19  Richard Henderson  <rth@redhat.com>
+
+       PR target/19350
+       * config/i386/i386.c (ix86_expand_vector_move_misalign): Convert
+       to V4SFmode in SSE1 fallback load path.
+
 2005-01-19  Richard Henderson  <rth@redhat.com>
 
        * config/i386/i386.c (ix86_expand_vector_init_one_var): Fix typo

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 447393d45a2bf9ef16c0d0c18b929530dc5b91ad..256d38fa0ec19d88ec66c0555c7bf8c8c883d459 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -7703,6 +7703,8 @@ ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[])
          else
            emit_insn (gen_rtx_CLOBBER (VOIDmode, op0));
 
+         if (mode != V4SFmode)
+           op0 = gen_lowpart (V4SFmode, op0);
          m = adjust_address (op1, V2SFmode, 0);
          emit_insn (gen_sse_loadlps (op0, op0, m));
          m = adjust_address (op1, V2SFmode, 8);