update 22nm page

diff --git a/22nm_PowerPI.mdwn b/22nm_PowerPI.mdwn
index 9a0f8fe1136af6242347f2bc4de240c644ed8b28..e572f9f128a76d01e8c081875c4fc19a7d933c44 100644 (file)
--- a/22nm_PowerPI.mdwn
+++ b/22nm_PowerPI.mdwn
@@ -31,6 +31,10 @@ up to 12-14 different products.
   - dual 32-bit DDR3/4 interfaces.
   - Suitable for 4k HD resolution screens and Graphics Card capability.
 
+By re-packaging the same die in different FPGA packages it meets the
+needs of different markets without significant NREs.  Texas Instruments
+and Freescale/NXP and many other companies follow this practice.
+
 **Timeframe from when funding is received:**
 
 * 6-8 months for PHY negotiation and supply by IP Vendors (DDR4 is always
@@ -55,7 +59,7 @@ These are ballpark estimates:
 * USD 50,000 for PCIe PHY
 * USD 50,000 for RGMII Ethernet PHY
 * USD 50,000 for Libre-licensed PCIe firmware (normally closed binary)
-* USD 2,000,000 for Engineers
+* USD 2,000,000 for Software and Hardware Engineers
 * USD 2,000,000 for 22nm Production Masks (1,000,000 for 28nm)
 * USD 200,000 per 22nm MPW Shuttle Service (test ASICs.  28nm is 100,000)
 * USD 200,000 estimated for other PHYs (UART, SD/MMC, I2C, SPI)