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diff --git a/nlnet_2019_video.mdwn b/nlnet_2019_video.mdwn
index 9643bb8ff872dd2ef7bfe4995d47e77f7efd7208..b3e25ec4286f3774311d6c389bb7e5cecf77aa84 100644 (file)
--- a/nlnet_2019_video.mdwn
+++ b/nlnet_2019_video.mdwn
@@ -27,7 +27,7 @@ One of the main "hardware accelerated blocks" of any processor intended for user
 
 In a privacy-respecting world neither of these are acceptable, therefore the goal is to develop - in an iterative fashion - not just the software but the actual hardware instructions (similar to ARM NEON) which, if fully integrated into libswscale, ffmpeg, gstreamer and other software, would make RISC-V a truly commercially competitive peer of ARM and x86 systems when it comes to video acceleration.
 
-With such capability freely available for any implementor, there would be no excuse for the inclusion of spying hardware blocks or coprocessors in modern RISC-V processors, and certsinly not in the Libre RISC-V SoC.
+With such capability freely available for any implementor, there would be no excuse for the inclusion of spying hardware blocks or coprocessors in modern RISC-V processors, and certainly not in the Libre RISC-V SoC.
 
 # Have you been involved with projects or organisations relevant to this project before? And if so, can you tell us a bit about your contributions?