Split out alpha integer register file into it's own files.

--HG--
extra : convert_revision : 164bdcec2860c5dca3f0f11d189781b88dd717cb

diff --git a/src/arch/alpha/SConscript b/src/arch/alpha/SConscript
index d9c9765a14c9fbfb371ced0998277e6cbc14f66b..b0a725e7aff8d2bb436e3e7787a806ea8345b3b0 100644 (file)
--- a/src/arch/alpha/SConscript
+++ b/src/arch/alpha/SConscript
@@ -50,6 +50,7 @@ base_sources = Split('''
        faults.cc
        isa_traits.cc
        miscregfile.cc
+       intregfile.cc
        ''')
 
 # Full-system sources

diff --git a/src/arch/alpha/intregfile.cc b/src/arch/alpha/intregfile.cc
new file mode 100644 (file)
index 0000000..0188cb2
--- /dev/null
+++ b/src/arch/alpha/intregfile.cc
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2003-2005 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Steve Reinhardt
+ *          Gabe Black
+ *          Kevin Lim
+ */
+
+#include "arch/alpha/isa_traits.hh"
+#include "arch/alpha/intregfile.hh"
+#include "sim/serialize.hh"
+
+namespace AlphaISA
+{
+#if FULL_SYSTEM
+    const int reg_redir[AlphaISA::NumIntRegs] = {
+        /*  0 */ 0, 1, 2, 3, 4, 5, 6, 7,
+        /*  8 */ 32, 33, 34, 35, 36, 37, 38, 15,
+        /* 16 */ 16, 17, 18, 19, 20, 21, 22, 23,
+        /* 24 */ 24, 39, 26, 27, 28, 29, 30, 31 };
+#else
+    const int reg_redir[AlphaISA::NumIntRegs] = {
+        /*  0 */ 0, 1, 2, 3, 4, 5, 6, 7,
+        /*  8 */ 8, 9, 10, 11, 12, 13, 14, 15,
+        /* 16 */ 16, 17, 18, 19, 20, 21, 22, 23,
+        /* 24 */ 24, 25, 26, 27, 28, 29, 30, 31 };
+#endif
+
+    void
+    IntRegFile::serialize(std::ostream &os)
+    {
+        SERIALIZE_ARRAY(regs, NumIntRegs);
+    }
+
+    void
+    IntRegFile::unserialize(Checkpoint *cp, const std::string &section)
+    {
+        UNSERIALIZE_ARRAY(regs, NumIntRegs);
+    }
+}
+

diff --git a/src/arch/alpha/intregfile.hh b/src/arch/alpha/intregfile.hh
new file mode 100644 (file)
index 0000000..78f6663
--- /dev/null
+++ b/src/arch/alpha/intregfile.hh
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2003-2005 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Steve Reinhardt
+ *          Gabe Black
+ */
+
+#ifndef __ARCH_ALPHA_INTREGFILE_HH__
+#define __ARCH_ALPHA_INTREGFILE_HH__
+
+#include "arch/alpha/types.hh"
+
+#include <iostream>
+#include <strings.h>
+
+class Checkpoint;
+
+namespace AlphaISA
+{
+    // redirected register map, really only used for the full system case.
+    extern const int reg_redir[NumIntRegs];
+
+    class IntRegFile
+    {
+      protected:
+        IntReg regs[NumIntRegs];
+
+      public:
+
+        IntReg readReg(int intReg)
+        {
+            return regs[intReg];
+        }
+
+        void setReg(int intReg, const IntReg &val)
+        {
+            regs[intReg] = val;
+        }
+
+        void serialize(std::ostream &os);
+
+        void unserialize(Checkpoint *cp, const std::string &section);
+
+        void clear()
+        { bzero(regs, sizeof(regs)); }
+    };
+}
+
+#endif

diff --git a/src/arch/alpha/isa_traits.hh b/src/arch/alpha/isa_traits.hh
index 3759b022b9a8d94ea66fe943b4705b4ad4afd3ba..35d9ce8435167fe820adadd552f219ee5073da17 100644 (file)
--- a/src/arch/alpha/isa_traits.hh
+++ b/src/arch/alpha/isa_traits.hh
@@ -114,7 +114,6 @@ namespace AlphaISA
         NumInterruptLevels = INTLEVEL_EXTERNAL_MAX
     };
 
-
     // EV5 modes
     enum mode_type
     {
@@ -181,9 +180,6 @@ namespace AlphaISA
     // Alpha UNOP (ldq_u r31,0(r0))
     const ExtMachInst NoopMachInst = 0x2ffe0000;
 
-    // redirected register map, really only used for the full system case.
-    extern const int reg_redir[NumIntRegs];
-
 };
 
 #endif // __ARCH_ALPHA_ISA_TRAITS_HH__

diff --git a/src/arch/alpha/regfile.hh b/src/arch/alpha/regfile.hh
index af28f6c6ff9472e8a27916721323efaa1bd27034..091f0e2e6a5b31d02c1a00f4bae92d236be8c245 100644 (file)
--- a/src/arch/alpha/regfile.hh
+++ b/src/arch/alpha/regfile.hh
@@ -32,7 +32,7 @@
 #define __ARCH_ALPHA_REGFILE_HH__
 
 #include "arch/alpha/isa_traits.hh"
-#include "arch/alpha/ipr.hh"
+#include "arch/alpha/intregfile.hh"
 #include "arch/alpha/miscregfile.hh"
 #include "arch/alpha/types.hh"
 #include "sim/faults.hh"
@@ -62,32 +62,6 @@ namespace AlphaISA
         return "";
     }
 
-    class IntRegFile
-    {
-      protected:
-        IntReg regs[NumIntRegs];
-
-      public:
-
-        IntReg readReg(int intReg)
-        {
-            return regs[intReg];
-        }
-
-        Fault setReg(int intReg, const IntReg &val)
-        {
-            regs[intReg] = val;
-            return NoFault;
-        }
-
-        void serialize(std::ostream &os);
-
-        void unserialize(Checkpoint *cp, const std::string &section);
-
-        void clear()
-        { bzero(regs, sizeof(regs)); }
-    };
-
     class FloatRegFile
     {
       public:
@@ -249,10 +223,6 @@ namespace AlphaISA
     void copyRegs(ThreadContext *src, ThreadContext *dest);
 
     void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
-
-#if FULL_SYSTEM
-    void copyIprs(ThreadContext *src, ThreadContext *dest);
-#endif
 } // namespace AlphaISA
 
 #endif