[libre-riscv-dev] [Bug 296] idea: cyclic buffer between FUs and register file
authorbugzilla-daemon <bugzilla-daemon@libre-soc.org>
Fri, 1 May 2020 02:10:01 +0000 (02:10 +0000)
committerlibre-riscv-dev <libre-riscv-dev@lists.libre-riscv.org>
Fri, 1 May 2020 02:10:02 +0000 (03:10 +0100)
26/4a12c513c7ed812eab9d3cf0844121cee698b4 [new file with mode: 0644]

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+Date: Fri, 01 May 2020 02:10:01 +0000
+X-Bugzilla-Reason: CC
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+X-Bugzilla-Product: Libre-SOC's first SoC
+X-Bugzilla-Component: Source Code
+X-Bugzilla-Version: unspecified
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+X-Bugzilla-Severity: enhancement
+X-Bugzilla-Who: lkcl@lkcl.net
+X-Bugzilla-Status: CONFIRMED
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+Message-ID: <bug-296-13-yVJdVwEqb2@https.bugs.libre-soc.org/>
+In-Reply-To: <bug-296-13@https.bugs.libre-soc.org/>
+References: <bug-296-13@https.bugs.libre-soc.org/>
+X-Bugzilla-URL: https://bugs.libre-soc.org/
+Auto-Submitted: auto-generated
+MIME-Version: 1.0
+Subject: [libre-riscv-dev] [Bug 296] idea: cyclic buffer between FUs and
+ register file
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