radeonsi: drop support for NULL sampler views
authorMarek Olšák <marek.olsak@amd.com>
Sun, 2 Oct 2016 13:40:10 +0000 (15:40 +0200)
committerMarek Olšák <marek.olsak@amd.com>
Tue, 4 Oct 2016 14:11:57 +0000 (16:11 +0200)
not used anymore. It was used when the polygon stipple texture was constant.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
src/gallium/drivers/radeonsi/si_descriptors.c
src/gallium/drivers/radeonsi/si_state.c

index 21dad3cd2b91ad61af0c58e350c13944273b2f98..3066323180e119a0d0f1709ca1c20d8a40aaa3ef 100644 (file)
@@ -410,10 +410,11 @@ static void si_set_sampler_view(struct si_context *sctx,
                struct r600_texture *rtex = (struct r600_texture *)view->texture;
                uint32_t *desc = descs->list + slot * 16;
 
+               assert(rtex); /* views with texture == NULL aren't supported */
                pipe_sampler_view_reference(&views->views[slot], view);
                memcpy(desc, rview->state, 8*4);
 
-               if (view->texture && view->texture->target != PIPE_BUFFER) {
+               if (rtex->resource.b.b.target != PIPE_BUFFER) {
                        bool is_separate_stencil =
                                rtex->db_compatible &&
                                rview->is_stencil_sampler;
@@ -427,7 +428,7 @@ static void si_set_sampler_view(struct si_context *sctx,
                                                       desc);
                }
 
-               if (view->texture && view->texture->target != PIPE_BUFFER &&
+               if (rtex->resource.b.b.target != PIPE_BUFFER &&
                    rtex->fmask.size) {
                        memcpy(desc + 8,
                               rview->fmask_state, 8*4);
index 04b57dc5e030342f088f04737f20db4840b8df0b..0376693f85208e85e82116307c56ed242a94179a 100644 (file)
@@ -2950,16 +2950,7 @@ si_create_sampler_view_custom(struct pipe_context *ctx,
        view->base.reference.count = 1;
        view->base.context = ctx;
 
-       /* NULL resource, obey swizzle (only ZERO and ONE make sense). */
-       if (!texture) {
-               view->state[3] = S_008F1C_DST_SEL_X(si_map_swizzle(state->swizzle_r)) |
-                                S_008F1C_DST_SEL_Y(si_map_swizzle(state->swizzle_g)) |
-                                S_008F1C_DST_SEL_Z(si_map_swizzle(state->swizzle_b)) |
-                                S_008F1C_DST_SEL_W(si_map_swizzle(state->swizzle_a)) |
-                                S_008F1C_TYPE(V_008F1C_SQ_RSRC_IMG_1D);
-               return &view->base;
-       }
-
+       assert(texture);
        pipe_resource_reference(&view->base.texture, texture);
 
        if (state->format == PIPE_FORMAT_X24S8_UINT ||