(const_string "sselog1")
]
(const_string "ssemov")))
- (set_attr "unit" "*,*,*,*,*,*,mmx,mmx,*,*,*,*,*")
- (set_attr "prefix_rep" "*,*,*,*,*,*,1,1,*,1,*,*,*")
- (set_attr "prefix_data16" "*,*,*,*,*,*,*,*,*,*,1,1,1")
+ (set (attr "unit")
+ (if_then_else (eq_attr "alternative" "6,7")
+ (const_string "mmx")
+ (const_string "*")))
+ (set (attr "prefix_rep")
+ (if_then_else (eq_attr "alternative" "6,7,9")
+ (const_string "1")
+ (const_string "*")))
+ (set (attr "prefix_data16")
+ (if_then_else (eq_attr "alternative" "10,11,12")
+ (const_string "1")
+ (const_string "*")))
(set (attr "prefix_rex")
(if_then_else (eq_attr "alternative" "9,10")
(symbol_ref "x86_extended_reg_mentioned_p (insn)")
(const_string "multi")
]
(const_string "ssemov")))
- (set_attr "unit" "*,*,*,*,mmx,mmx,*,*,*,*,*,*,*,*,*")
+ (set (attr "unit")
+ (if_then_else (eq_attr "alternative" "4,5")
+ (const_string "mmx")
+ (const_string "*")))
(set (attr "prefix_rep")
(if_then_else
(ior (eq_attr "alternative" "4,5")
(const_string "sselog1")
]
(const_string "ssemov")))
- (set_attr "unit" "*,*,*,*,*,*,mmx,mmx,*,*,*,*,*,*")
- (set_attr "prefix_rep" "*,*,*,*,*,*,1,1,*,*,*,*,*,*")
+ (set (attr "unit")
+ (if_then_else (eq_attr "alternative" "6,7")
+ (const_string "mmx")
+ (const_string "*")))
+ (set (attr "prefix_rep")
+ (if_then_else (eq_attr "alternative" "6,7")
+ (const_string "1")
+ (const_string "*")))
(set (attr "length_vex")
(if_then_else
(and (eq_attr "alternative" "12,13")
(const_string "multi")
]
(const_string "ssemov")))
- (set_attr "unit" "*,*,*,*,mmx,mmx,*,*,*,*,*,*")
- (set_attr "prefix_rep" "*,*,*,*,1,1,*,*,*,*,*,*")
+ (set (attr "unit")
+ (if_then_else (eq_attr "alternative" "4,5")
+ (const_string "mmx")
+ (const_string "*")))
+ (set (attr "prefix_rep")
+ (if_then_else (eq_attr "alternative" "4,5")
+ (const_string "1")
+ (const_string "*")))
(set (attr "prefix")
(if_then_else (eq_attr "alternative" "6,7,8,9")
(const_string "maybe_vex")
;; Random 256bit vector integer mode combinations
(define_mode_iterator VI124_256 [V32QI V16HI V8SI])
-(define_mode_iterator VI1248_256 [V32QI V16HI V8SI V4DI])
(define_mode_iterator VI248_256 [V16HI V8SI V4DI])
;; Int-float size matches
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
(define_expand "avx2_eq<mode>3"
- [(set (match_operand:VI1248_256 0 "register_operand" "")
- (eq:VI1248_256
- (match_operand:VI1248_256 1 "nonimmediate_operand" "")
- (match_operand:VI1248_256 2 "nonimmediate_operand" "")))]
+ [(set (match_operand:VI_256 0 "register_operand" "")
+ (eq:VI_256
+ (match_operand:VI_256 1 "nonimmediate_operand" "")
+ (match_operand:VI_256 2 "nonimmediate_operand" "")))]
"TARGET_AVX2"
"ix86_fixup_binary_operands_no_copy (EQ, <MODE>mode, operands);")
(define_insn "*avx2_eq<mode>3"
- [(set (match_operand:VI1248_256 0 "register_operand" "=x")
- (eq:VI1248_256
- (match_operand:VI1248_256 1 "nonimmediate_operand" "%x")
- (match_operand:VI1248_256 2 "nonimmediate_operand" "xm")))]
+ [(set (match_operand:VI_256 0 "register_operand" "=x")
+ (eq:VI_256
+ (match_operand:VI_256 1 "nonimmediate_operand" "%x")
+ (match_operand:VI_256 2 "nonimmediate_operand" "xm")))]
"TARGET_AVX2 && ix86_binary_operator_ok (EQ, <MODE>mode, operands)"
"vpcmpeq<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "type" "ssecmp")
(set_attr "mode" "TI")])
(define_insn "avx2_gt<mode>3"
- [(set (match_operand:VI1248_256 0 "register_operand" "=x")
- (gt:VI1248_256
- (match_operand:VI1248_256 1 "register_operand" "x")
- (match_operand:VI1248_256 2 "nonimmediate_operand" "xm")))]
+ [(set (match_operand:VI_256 0 "register_operand" "=x")
+ (gt:VI_256
+ (match_operand:VI_256 1 "register_operand" "x")
+ (match_operand:VI_256 2 "nonimmediate_operand" "xm")))]
"TARGET_AVX2"
"vpcmpgt<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "type" "ssecmp")