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Added support for verilog === operator
author
Clifford Wolf
<clifford@clifford.at>
Tue, 7 May 2013 12:35:40 +0000
(14:35 +0200)
committer
Clifford Wolf
<clifford@clifford.at>
Tue, 7 May 2013 12:35:40 +0000
(14:35 +0200)
frontends/verilog/lexer.l
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diff --git
a/frontends/verilog/lexer.l
b/frontends/verilog/lexer.l
index 2a6c441717b53d190b558c13f9acdb10eb6e9889..f899191bb865a8c3548e102929de8096618264dc 100644
(file)
--- a/
frontends/verilog/lexer.l
+++ b/
frontends/verilog/lexer.l
@@
-233,6
+233,8
@@
supply1 { return TOK_SUPPLY1; }
"<=" { return OP_LE; }
">=" { return OP_GE; }
+"===" { return OP_EQ; }
+
/* "~&" { return OP_NAND; } */
/* "~|" { return OP_NOR; } */
"~^" { return OP_XNOR; }