(addsi3, adddi3): For patterns valid only during reload, allow operand

1 to be `some_operand'.

From-SVN: r8483

diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md
index df3b80ec3bb33c31e2b1caea0e3d665e016b719e..611aeb43c433f7a10d64ea4c48c46711ab6aa29c 100644 (file)
--- a/gcc/config/alpha/alpha.md
+++ b/gcc/config/alpha/alpha.md
@@ -295,7 +295,7 @@
                                           
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=&r")
-       (plus:SI (plus:SI (mult:SI (match_operand:SI 1 "reg_or_0_operand" "rJ")
+       (plus:SI (plus:SI (mult:SI (match_operand:SI 1 "some_operand" "rJ")
                                   (match_operand:SI 2 "const48_operand" "I"))
                          (match_operand:SI 3 "register_operand" "r"))
                 (match_operand:SI 4 "add_operand" "rIOKL")))]
@@ -319,7 +319,7 @@
   [(set (match_operand:DI 0 "register_operand" "=&r")
        (sign_extend:DI
         (plus:SI (plus:SI
-                  (mult:SI (match_operand:SI 1 "reg_or_0_operand" "rJ")
+                  (mult:SI (match_operand:SI 1 "some_operand" "rJ")
                            (match_operand:SI 2 "const48_operand" "I"))
                   (match_operand:SI 3 "register_operand" "r"))
                  (match_operand:SI 4 "add_operand" "rIOKL"))))]
@@ -345,7 +345,7 @@
 
 (define_insn ""
   [(set (match_operand:DI 0 "register_operand" "=&r")
-       (plus:DI (plus:DI (mult:DI (match_operand:DI 1 "reg_or_0_operand" "rJ")
+       (plus:DI (plus:DI (mult:DI (match_operand:DI 1 "some_operand" "rJ")
                                   (match_operand:DI 2 "const48_operand" "I"))
                          (match_operand:DI 3 "register_operand" "r"))
                 (match_operand:DI 4 "add_operand" "rIOKL")))]