Stop the assembler from generating R_ARM_THM_JMP11 relocations as these are not suppo...
authorNick Clifton <nickc@redhat.com>
Thu, 25 Jun 2020 10:11:51 +0000 (11:11 +0100)
committerNick Clifton <nickc@redhat.com>
Thu, 25 Jun 2020 10:11:51 +0000 (11:11 +0100)
PR 26141
* config/tc-arm.c (arm_force_relocation): Force resolution of
BFD_RELOC_THUMB_PCREL_BRANCH12 relocations.
* testsuite/gas/arm/plt-1.d: Adjust expected disassembly.

gas/ChangeLog
gas/config/tc-arm.c
gas/testsuite/gas/arm/plt-1.d

index 8fc1d8417c961bae02d17dcb08d4765a98d4bb5f..038ae0c47b4f709cf06c3cac637d65a9429ef7d7 100644 (file)
@@ -1,3 +1,10 @@
+2020-06-25  Nick Clifton  <nickc@redhat.com>
+
+       PR 26141
+       * config/tc-arm.c (arm_force_relocation): Force resolution of
+       BFD_RELOC_THUMB_PCREL_BRANCH12 relocations.
+       * testsuite/gas/arm/plt-1.d: Adjust expected disassembly.
+
 2020-06-25  Jan Beulich  <jbeulich@suse.com>
 
        * config/tc-i386.c (md_assemble): Move call to process_immext()
index 00fa2c76c8345ee43edb9fb8ed3d0882bf55999f..a7e0ae785b7229cf183811771701796f4c23a78d 100644 (file)
@@ -30369,6 +30369,7 @@ arm_force_relocation (struct fix * fixp)
       || fixp->fx_r_type == BFD_RELOC_ARM_CP_OFF_IMM
       || fixp->fx_r_type == BFD_RELOC_ARM_CP_OFF_IMM_S2
       || fixp->fx_r_type == BFD_RELOC_ARM_THUMB_OFFSET
+      || fixp->fx_r_type == BFD_RELOC_THUMB_PCREL_BRANCH12
       || fixp->fx_r_type == BFD_RELOC_ARM_T32_ADD_IMM
       || fixp->fx_r_type == BFD_RELOC_ARM_T32_IMMEDIATE
       || fixp->fx_r_type == BFD_RELOC_ARM_T32_IMM12
index 4f1fe9c0c83fb258ce9f923a86e144c052fdb062..1f8046ef2ef5554bcbce983f284355f48ec1d359 100644 (file)
@@ -14,25 +14,21 @@ Disassembly of section \.text:
                        0: R_ARM_THM_JUMP24     Strong2
    4:  f7ff bffe       b\.w    14 <Strong2>
                        4: R_ARM_THM_JUMP24     Strong2
-   8:  e7fe            b\.n    14 <Strong2>
-                       8: R_ARM_THM_JUMP11     Strong2
+   8:  e004            b\.n    14 <Strong2>
    a:  f7ff bffe       b\.w    14 <Strong2>
                        a: R_ARM_THM_JUMP24     Strong2
    e:  f7ff bffe       b\.w    14 <Strong2>
                        e: R_ARM_THM_JUMP24     Strong2
-  12:  e7fe            b\.n    14 <Strong2>
-                       12: R_ARM_THM_JUMP11    Strong2
+  12:  e7ff            b\.n    14 <Strong2>
 
 0+014 <Strong2>:
   14:  f7ff bffe       b\.w    0 <Strong1>
                        14: R_ARM_THM_JUMP24    Strong1
   18:  f7ff bffe       b\.w    0 <Strong1>
                        18: R_ARM_THM_JUMP24    Strong1
-  1c:  e7fe            b\.n    0 <Strong1>
-                       1c: R_ARM_THM_JUMP11    Strong1
+  1c:  e7f0            b\.n    0 <Strong1>
   1e:  f7ff bffe       b\.w    0 <Strong1>
                        1e: R_ARM_THM_JUMP24    Strong1
   22:  f7ff bffe       b\.w    0 <Strong1>
                        22: R_ARM_THM_JUMP24    Strong1
-  26:  e7fe            b\.n    0 <Strong1>
-                       26: R_ARM_THM_JUMP11    Strong1
+  26:  e7eb            b\.n    0 <Strong1>