+2017-01-25 Michael Meissner <meissner@linux.vnet.ibm.com>
+
+ PR target/79179
+ * config/rs6000/vsx.md (vsx_extract_<mode>_store): Use wY
+ constraint instead of o for the stxsd instruction.
+
2017-01-25 Carl Love <cel@us.ibm.com>
* config/rs6000/rs6000-c (altivec_overloaded_builtins): Fix order
;; Optimize storing a single scalar element that is the right location to
;; memory
(define_insn "*vsx_extract_<mode>_store"
- [(set (match_operand:<VS_scalar> 0 "memory_operand" "=m,Z,o")
+ [(set (match_operand:<VS_scalar> 0 "memory_operand" "=m,Z,wY")
(vec_select:<VS_scalar>
(match_operand:VSX_D 1 "register_operand" "d,wv,wb")
(parallel [(match_operand:QI 2 "vsx_scalar_64bit" "wD,wD,wD")])))]
+2017-01-25 Michael Meissner <meissner@linux.vnet.ibm.com>
+
+ PR target/79179
+ * gcc.target/powerpc/pr79179.c: New test.
+
2017-01-25 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.target/powerpc/vsx-elemrev-4.c: Change expected code
--- /dev/null
+/* { dg-do assemble { target { powerpc*-*-* && lp64 } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-options "-mcpu=power9 -O3" } */
+
+/* Compile with -O3 -mcpu=power9. It originally generated
+
+ stxsd 12,1(9)
+
+ which is illegal. */
+
+#pragma pack(1)
+struct {
+ signed : 1;
+ unsigned long a;
+} b;
+
+void c(void)
+{
+ b.a = 0;
+ for (; b.a <= 45; b.a = (long)b.a + 1)
+ ;
+}