mips.md (prefetch): Use lw instead of ld on loongson in 32bit mode.

2013-08-13  Steve Ellcey  <sellcey@mips.com>

	* config/mips/mips.md (prefetch): Use lw instead of ld on
	loongson in 32bit mode.

From-SVN: r201691

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7eb0748fd361841a1aa5dc75fed1605905a86dfe..2cf949bae1915c8e7dddad82a1f39653d42efef5 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2013-08-13  Steve Ellcey  <sellcey@mips.com>
+
+       * config/mips/mips.md (prefetch): Use lw instead of ld on
+       loongson in 32bit mode.
+
 2013-08-13  Nick Clifton  <nickc@redhat.com>
 
        * config.gcc: (avr-linux): Allow for tmake_file not being empty.

diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 397c40ab1801908bddf8d98c52a70522d8d8b1c3..0cda169224f93e5c9ff29a2ef567bae8c56c1d85 100644 (file)
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -6673,8 +6673,13 @@
   "ISA_HAS_PREFETCH && TARGET_EXPLICIT_RELOCS"
 {
   if (TARGET_LOONGSON_2EF || TARGET_LOONGSON_3A)
-    /* Loongson 2[ef] and Loongson 3a use load to $0 to perform prefetching.  */
-    return "ld\t$0,%a0";
+    {
+      /* Loongson 2[ef] and Loongson 3a use load to $0 for prefetching.  */
+      if (TARGET_64BIT)
+        return "ld\t$0,%a0";
+      else
+        return "lw\t$0,%a0";
+    }
   operands[1] = mips_prefetch_cookie (operands[1], operands[2]);
   return "pref\t%1,%a0";
 }