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Re: Change readelf's display of symbol names
authorAlan Modra <amodra@gmail.com>
Fri, 3 Jul 2020 05:59:13 +0000 (15:29 +0930)
committerAlan Modra <amodra@gmail.com>
Fri, 3 Jul 2020 07:45:16 +0000 (17:15 +0930)
Fixes some fallout from git commit 0942c7ab94e5.

PR 26028
gas/
* testsuite/gas/ia64/unwind-ilp32.d: Add -T to readelf options.
gold/
* testsuite/Makefile.am (file_in_many_sections.stdout): Add -W
to readelf options.
* testsuite/Makefile.in: Regenerate.
ld/
* testsuite/ld-arm/arm-elf.exp (vxworks1): Pass --wide to readelf
when dumping relocs.
* testsuite/ld-i386/i386.exp (vxworks1): Likewise.
* testsuite/ld-sh/sh-vxworks.exp (vxworks1): Likewise.
* testsuite/ld-sparc/sparc.exp (vxworks1): Likewise.
* testsuite/ld-arm/vxworks1.rd: Adjust to suit.
* testsuite/ld-i386/vxworks1.rd: Adjust.
* testsuite/ld-sh/vxworks1.rd: Adjust.
* testsuite/ld-sparc/vxworks1.rd: Adjust.

14 files changed:
gas/ChangeLog patch | blob | history
gas/testsuite/gas/ia64/unwind-ilp32.d patch | blob | history
gold/ChangeLog patch | blob | history
gold/testsuite/Makefile.am patch | blob | history
gold/testsuite/Makefile.in patch | blob | history
ld/ChangeLog patch | blob | history
ld/testsuite/ld-arm/arm-elf.exp patch | blob | history
ld/testsuite/ld-arm/vxworks1.rd patch | blob | history
ld/testsuite/ld-i386/i386.exp patch | blob | history
ld/testsuite/ld-i386/vxworks1.rd patch | blob | history
ld/testsuite/ld-sh/sh-vxworks.exp patch | blob | history
ld/testsuite/ld-sh/vxworks1.rd patch | blob | history
ld/testsuite/ld-sparc/sparc.exp patch | blob | history
ld/testsuite/ld-sparc/vxworks1.rd patch | blob | history

diff --git a/gas/ChangeLog b/gas/ChangeLog
index c63f5257d149081249ee37cae7b389f34d31fdbe..216ad581ae48bd337def85607ac1cd410c3c9285 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2020-07-03  Alan Modra  <amodra@gmail.com>
+
+       PR 26028
+       * testsuite/gas/ia64/unwind-ilp32.d: Add -T to readelf options.
+
 2020-07-02  H.J. Lu  <hongjiu.lu@intel.com>
 
        * config/tc-i386.c (build_modrm_byte): Check vexswapsources to
diff --git a/gas/testsuite/gas/ia64/unwind-ilp32.d b/gas/testsuite/gas/ia64/unwind-ilp32.d
index e96f89b479edf2c5fbf9e8e82670079f44757aed..9c12aad5a54935d27d4ad248b16cba9450b2fce9 100644 (file)
--- a/gas/testsuite/gas/ia64/unwind-ilp32.d
+++ b/gas/testsuite/gas/ia64/unwind-ilp32.d
@@ -1,4 +1,4 @@
-#readelf: -S
+#readelf: -ST
 #name: ia64 unwind section (ilp32)
 #as: -milp32
 #source: unwind.s
diff --git a/gold/ChangeLog b/gold/ChangeLog
index 9e06ff80c27cd8979bb9d4f0d5f8103c30163fe5..ca99f13557b30476e0c30d190df29e2730a29c18 100644 (file)
--- a/gold/ChangeLog
+++ b/gold/ChangeLog
@@ -1,3 +1,10 @@
+2020-07-03  Alan Modra  <amodra@gmail.com>
+
+       PR 26028
+       * testsuite/Makefile.am (file_in_many_sections.stdout): Add -W
+       to readelf options.
+       * testsuite/Makefile.in: Regenerate.
+
 2020-06-26  Nick Alcock  <nick.alcock@oracle.com>
 
        * configure.ac: Check for bswap_16, bswap_32, and bswap_64 decls.
diff --git a/gold/testsuite/Makefile.am b/gold/testsuite/Makefile.am
index ccbe47f22929820d274003f3b6cbc08d67107465..0644e23a1bb3effbc729cd14161c6babbdb97b67 100644 (file)
--- a/gold/testsuite/Makefile.am
+++ b/gold/testsuite/Makefile.am
@@ -1479,7 +1479,7 @@ file_in_many_sections.o: file_in_many_sections.c many_sections_define.h
 file_in_many_sections: file_in_many_sections.o gcctestdir/ld
        $(LINK) file_in_many_sections.o -Wl,--gc-sections
 file_in_many_sections.stdout: file_in_many_sections
-       $(TEST_READELF) -s $< > $@
+       $(TEST_READELF) -sW $< > $@
 
 check_PROGRAMS += initpri1
 initpri1_SOURCES = initpri1.c
diff --git a/gold/testsuite/Makefile.in b/gold/testsuite/Makefile.in
index 7dc2853cec346bfb4d9e8dafa2cf8ad51624c4a0..dfcafcdc5703ef2b5d3c58152998dfe827fe0ff2 100644 (file)
--- a/gold/testsuite/Makefile.in
+++ b/gold/testsuite/Makefile.in
@@ -8521,7 +8521,7 @@ uninstall-am:
 @GCC_TRUE@@NATIVE_LINKER_TRUE@file_in_many_sections: file_in_many_sections.o gcctestdir/ld
 @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(LINK) file_in_many_sections.o -Wl,--gc-sections
 @GCC_TRUE@@NATIVE_LINKER_TRUE@file_in_many_sections.stdout: file_in_many_sections
-@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(TEST_READELF) -s $< > $@
+@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(TEST_READELF) -sW $< > $@
 @GCC_TRUE@@NATIVE_LINKER_TRUE@debug_msg.o: debug_msg.cc
 @GCC_TRUE@@NATIVE_LINKER_TRUE@ $(CXXCOMPILE) -O0 -g -c -w -o $@ $(srcdir)/debug_msg.cc
 @GCC_TRUE@@NATIVE_LINKER_TRUE@odr_violation1.o: odr_violation1.cc
diff --git a/ld/ChangeLog b/ld/ChangeLog
index 156bcbaab8ae1ab37a7ba8923575482d8a6ed25b..43958089c1bbb6d489ed601a8c60d1eab3cdea1b 100644 (file)
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,16 @@
+2020-07-03  Alan Modra  <amodra@gmail.com>
+
+       PR 26028
+       * testsuite/ld-arm/arm-elf.exp (vxworks1): Pass --wide to readelf
+       when dumping relocs.
+       * testsuite/ld-i386/i386.exp (vxworks1): Likewise.
+       * testsuite/ld-sh/sh-vxworks.exp (vxworks1): Likewise.
+       * testsuite/ld-sparc/sparc.exp (vxworks1): Likewise.
+       * testsuite/ld-arm/vxworks1.rd: Adjust to suit.
+       * testsuite/ld-i386/vxworks1.rd: Adjust.
+       * testsuite/ld-sh/vxworks1.rd: Adjust.
+       * testsuite/ld-sparc/vxworks1.rd: Adjust.
+
 2020-07-02  Nick Clifton  <nickc@redhat.com>
 
        PR 26028
diff --git a/ld/testsuite/ld-arm/arm-elf.exp b/ld/testsuite/ld-arm/arm-elf.exp
index 1289317d80d5eb61115073b286d179d31e2b29f9..0b47d636df3fbf045896c0cab8beda133cdfb7d4 100644 (file)
--- a/ld/testsuite/ld-arm/arm-elf.exp
+++ b/ld/testsuite/ld-arm/arm-elf.exp
@@ -30,7 +30,7 @@ if {[istarget "arm-*-vxworks"]} {
        {"VxWorks executable test 1 (dynamic)"
         "tmpdir/libvxworks1.so -Tvxworks1.ld --hash-style=sysv -q --force-dynamic" ""
         "" {vxworks1.s}
-        {{readelf --relocs vxworks1.rd} {objdump -dr vxworks1.dd}}
+        {{readelf {--relocs --wide} vxworks1.rd} {objdump -dr vxworks1.dd}}
         "vxworks1"}
        {"VxWorks executable test 2 (dynamic)" \
         "-Tvxworks1.ld --hash-style=sysv -q --force-dynamic" ""
diff --git a/ld/testsuite/ld-arm/vxworks1.rd b/ld/testsuite/ld-arm/vxworks1.rd
index 8c55059e6b9bbe0263e037dffb2b75a1f079b6a5..aefcd046c395c78481a8e723ccdb51391e441ee4 100644 (file)
--- a/ld/testsuite/ld-arm/vxworks1.rd
+++ b/ld/testsuite/ld-arm/vxworks1.rd
@@ -1,19 +1,19 @@
 
 Relocation section '\.rela\.plt' at offset .* contains 2 entries:
- Offset     Info    Type            Sym\.Value  Sym\. Name \+ Addend
-0008140c  .*16 R_ARM_JUMP_SLOT   000.....   sglobal \+ 0
-00081410  .*16 R_ARM_JUMP_SLOT   000.....   foo \+ 0
+ Offset +Info +Type +Sym.*
+0008140c +.*16 R_ARM_JUMP_SLOT +000..... +sglobal \+ 0
+00081410 +.*16 R_ARM_JUMP_SLOT +000..... +foo \+ 0
 
 Relocation section '\.rela\.text' at offset .* contains 3 entries:
- Offset     Info    Type            Sym.Value  Sym. Name \+ Addend
-00080c00  .*01 R_ARM_PC24        00080800   \.plt \+ 20
-00080c04  .*01 R_ARM_PC24        000.....   sexternal - 8
-00080c08  .*01 R_ARM_PC24        00080800   \.plt \+ 8
+ Offset +Info +Type +Sym.*
+00080c00 +.*01 R_ARM_PC24 +00080800 +\.plt \+ 20
+00080c04 +.*01 R_ARM_PC24 +000..... +sexternal - 8
+00080c08 +.*01 R_ARM_PC24 +00080800 +\.plt \+ 8
 
 Relocation section '\.rela\.plt\.unloaded' at offset .* contains 5 entries:
- Offset     Info    Type            Sym\.Value  Sym\. Name \+ Addend
-0008080c  .*02 R_ARM_ABS32       00081400   _GLOBAL_OFFSET_TABLE_ \+ 0
-00080818  .*02 R_ARM_ABS32       00081400   _GLOBAL_OFFSET_TABLE_ \+ c
-0008140c  .*02 R_ARM_ABS32       00080800   _PROCEDURE_LINKAGE_TAB.* \+ 0
-00080830  .*02 R_ARM_ABS32       00081400   _GLOBAL_OFFSET_TABLE_ \+ 10
-00081410  .*02 R_ARM_ABS32       00080800   _PROCEDURE_LINKAGE_TAB.* \+ 0
+ Offset +Info +Type +Sym.*
+0008080c +.*02 R_ARM_ABS32 +00081400 +_GLOBAL_OFFSET_TABLE_ \+ 0
+00080818 +.*02 R_ARM_ABS32 +00081400 +_GLOBAL_OFFSET_TABLE_ \+ c
+0008140c +.*02 R_ARM_ABS32 +00080800 +_PROCEDURE_LINKAGE_TABLE_ \+ 0
+00080830 +.*02 R_ARM_ABS32 +00081400 +_GLOBAL_OFFSET_TABLE_ \+ 10
+00081410 +.*02 R_ARM_ABS32 +00080800 +_PROCEDURE_LINKAGE_TABLE_ \+ 0
diff --git a/ld/testsuite/ld-i386/i386.exp b/ld/testsuite/ld-i386/i386.exp
index 27ad1693a3c3553e17c13e84907d108b9248a83e..e51981a38da36651c77da09e8b159c522f9d8f79 100644 (file)
--- a/ld/testsuite/ld-i386/i386.exp
+++ b/ld/testsuite/ld-i386/i386.exp
@@ -39,7 +39,7 @@ if {[istarget "i?86-*-vxworks"]} {
        {"VxWorks executable test 1 (dynamic)" \
         "tmpdir/libvxworks1.so -Tvxworks1.ld --hash-style=sysv -q --force-dynamic" ""
         "" {vxworks1.s}
-        {{readelf --relocs vxworks1.rd} {objdump -dr vxworks1.dd}}
+        {{readelf {--relocs --wide} vxworks1.rd} {objdump -dr vxworks1.dd}}
         "vxworks1"}
        {"VxWorks executable test 2 (dynamic)" \
         "-Tvxworks1.ld --hash-style=sysv -q --force-dynamic" ""
diff --git a/ld/testsuite/ld-i386/vxworks1.rd b/ld/testsuite/ld-i386/vxworks1.rd
index 9fd7383c820bec762f3f65c0b24b00c90c7791bc..778ab7a3cb3a3a8aa81e9b29c78e452e730842b8 100644 (file)
--- a/ld/testsuite/ld-i386/vxworks1.rd
+++ b/ld/testsuite/ld-i386/vxworks1.rd
@@ -1,20 +1,20 @@
 
 Relocation section '\.rel\.plt' at offset .* contains 2 entries:
- Offset     Info    Type            Sym\.Value  Sym\. Name
-0008140c  .*07 R_386_JUMP_SLOT   00000000   sglobal
-00081410  .*07 R_386_JUMP_SLOT   00000000   foo
+ Offset +Info +Type +Sym.*
+0008140c +.*07 R_386_JUMP_SLOT +00000000 +sglobal
+00081410 +.*07 R_386_JUMP_SLOT +00000000 +foo
 
 Relocation section '\.rel\.text' at offset .* contains 3 entries:
- Offset     Info    Type            Sym.Value  Sym. Name
-00080c01  .*04 R_386_PLT32       00080800   .plt
-00080c06  .*04 R_386_PLT32       00080c0f   sexternal
-00080c0b  .*04 R_386_PLT32       00080800   .plt
+ Offset +Info +Type +Sym.*
+00080c01 +.*04 R_386_PLT32 +00080800 +.plt
+00080c06 +.*04 R_386_PLT32 +00080c0f +sexternal
+00080c0b +.*04 R_386_PLT32 +00080800 +.plt
 
 Relocation section '\.rel\.plt\.unloaded' at offset .* contains 6 entries:
- Offset     Info    Type            Sym\.Value  Sym\. Name
-00080802  .*01 R_386_32          00081400   _GLOBAL_OFFSET_TABLE_
-00080808  .*01 R_386_32          00081400   _GLOBAL_OFFSET_TABLE_
-00080812  .*01 R_386_32          00081400   _GLOBAL_OFFSET_TABLE_
-0008140c  .*01 R_386_32          00080800   _PROCEDURE_LINKAGE_TAB.*
-00080822  .*01 R_386_32          00081400   _GLOBAL_OFFSET_TABLE_
-00081410  .*01 R_386_32          00080800   _PROCEDURE_LINKAGE_TAB.*
+ Offset +Info +Type +Sym.*
+00080802 +.*01 R_386_32 +00081400 +_GLOBAL_OFFSET_TABLE_
+00080808 +.*01 R_386_32 +00081400 +_GLOBAL_OFFSET_TABLE_
+00080812 +.*01 R_386_32 +00081400 +_GLOBAL_OFFSET_TABLE_
+0008140c +.*01 R_386_32 +00080800 +_PROCEDURE_LINKAGE_TABLE_
+00080822 +.*01 R_386_32 +00081400 +_GLOBAL_OFFSET_TABLE_
+00081410 +.*01 R_386_32 +00080800 +_PROCEDURE_LINKAGE_TABLE_
diff --git a/ld/testsuite/ld-sh/sh-vxworks.exp b/ld/testsuite/ld-sh/sh-vxworks.exp
index 48cb332eb008cb64b5e629e2310e9ac9b28ba3b0..0f1ef590557f8b4fa50a6f0d452ddb240b444946 100644 (file)
--- a/ld/testsuite/ld-sh/sh-vxworks.exp
+++ b/ld/testsuite/ld-sh/sh-vxworks.exp
@@ -36,7 +36,7 @@ foreach { gas_option ld_option suffix } $endians {
        {"VxWorks executable test 1 (dynamic)" \
         "tmpdir/libvxworks1.so -Tvxworks1.ld --hash-style=sysv -q --force-dynamic $ld_option" ""
         "$gas_option" {vxworks1.s}
-        {{readelf --relocs vxworks1.rd} {objdump -dr vxworks1$suffix.dd}}
+        {{readelf {--relocs --wide} vxworks1.rd} {objdump -dr vxworks1$suffix.dd}}
         "vxworks1"}
        {"VxWorks executable test 2 (dynamic)" \
         "-Tvxworks1.ld --hash-style=sysv -q --force-dynamic $ld_option" ""
diff --git a/ld/testsuite/ld-sh/vxworks1.rd b/ld/testsuite/ld-sh/vxworks1.rd
index ee50c74f689a6e6835e12a570f4987c65607d5b2..d95ebd7dcdb0c4f84b7231833748d5440bb046f7 100644 (file)
--- a/ld/testsuite/ld-sh/vxworks1.rd
+++ b/ld/testsuite/ld-sh/vxworks1.rd
@@ -1,19 +1,19 @@
 
 Relocation section '\.rela\.plt' at offset .* contains 2 entries:
- Offset     Info    Type            Sym\.Value  Sym\. Name \+ Addend
-0008140c  .*a4 R_SH_JMP_SLOT     0008080c   _sglobal \+ 0
-00081410  .*a4 R_SH_JMP_SLOT     00080824   _foo \+ 0
+ Offset +Info +Type +Sym.*
+0008140c +.*a4 R_SH_JMP_SLOT +0008080c +_sglobal \+ 0
+00081410 +.*a4 R_SH_JMP_SLOT +00080824 +_foo \+ 0
 
 Relocation section '\.rela\.text' at offset .* contains 3 entries:
- Offset     Info    Type            Sym.Value  Sym. Name \+ Addend
-00080c1c  .*01 R_SH_DIR32        00080800   \.plt \+ 24
-00080c20  .*01 R_SH_DIR32        00080800   \.plt \+ c
-00080c24  .*01 R_SH_DIR32        00080c28   _sexternal \+ 0
+ Offset +Info +Type +Sym.*
+00080c1c +.*01 R_SH_DIR32 +00080800 +\.plt \+ 24
+00080c20 +.*01 R_SH_DIR32 +00080800 +\.plt \+ c
+00080c24 +.*01 R_SH_DIR32 +00080c28 +_sexternal \+ 0
 
 Relocation section '\.rela\.plt\.unloaded' at offset .* contains 5 entries:
- Offset     Info    Type            Sym\.Value  Sym\. Name \+ Addend
-00080808  .*01 R_SH_DIR32        00081400   _GLOBAL_OFFSET_TABLE_ \+ 8
-00080814  .*01 R_SH_DIR32        00081400   _GLOBAL_OFFSET_TABLE_ \+ c
-0008140c  .*01 R_SH_DIR32        00080800   _PROCEDURE_LINKAGE_TAB.* \+ 0
-0008082c  .*01 R_SH_DIR32        00081400   _GLOBAL_OFFSET_TABLE_ \+ 10
-00081410  .*01 R_SH_DIR32        00080800   _PROCEDURE_LINKAGE_TAB.* \+ 0
+ Offset +Info +Type +Sym.*
+00080808 +.*01 R_SH_DIR32 +00081400 +_GLOBAL_OFFSET_TABLE_ \+ 8
+00080814 +.*01 R_SH_DIR32 +00081400 +_GLOBAL_OFFSET_TABLE_ \+ c
+0008140c +.*01 R_SH_DIR32 +00080800 +_PROCEDURE_LINKAGE_TABLE_ \+ 0
+0008082c +.*01 R_SH_DIR32 +00081400 +_GLOBAL_OFFSET_TABLE_ \+ 10
+00081410 +.*01 R_SH_DIR32 +00080800 +_PROCEDURE_LINKAGE_TABLE_ \+ 0
diff --git a/ld/testsuite/ld-sparc/sparc.exp b/ld/testsuite/ld-sparc/sparc.exp
index 6a736c7e4f5a75811c197015b8f6f875d489495f..b12614108ece306392968c0e5a26a9799d62133c 100644 (file)
--- a/ld/testsuite/ld-sparc/sparc.exp
+++ b/ld/testsuite/ld-sparc/sparc.exp
@@ -33,7 +33,7 @@ if {[istarget "sparc-*-vxworks"]} {
        {"VxWorks executable test 1 (dynamic)" \
         "tmpdir/libvxworks1.so -Tvxworks1.ld --hash-style=sysv -q --force-dynamic" ""
         "" {vxworks1.s}
-        {{readelf --relocs vxworks1.rd} {objdump -dr vxworks1.dd}}
+        {{readelf {--relocs --wide} vxworks1.rd} {objdump -dr vxworks1.dd}}
         "vxworks1"}
        {"VxWorks executable test 2 (dynamic)" \
         "-Tvxworks1.ld --hash-style=sysv -q --force-dynamic" ""
diff --git a/ld/testsuite/ld-sparc/vxworks1.rd b/ld/testsuite/ld-sparc/vxworks1.rd
index e02146b4f87aaaf5e4b379dee24a99101ce5b975..ef3a9bda4a00722fafabc047082bc75967faecc7 100644 (file)
--- a/ld/testsuite/ld-sparc/vxworks1.rd
+++ b/ld/testsuite/ld-sparc/vxworks1.rd
@@ -1,22 +1,22 @@
 
 Relocation section '\.rela\.plt' at offset .* contains 2 entries:
- Offset     Info    Type            Sym\.Value  Sym\. Name \+ Addend
-0009040c  .*15 R_SPARC_JMP_SLOT  00080814   sglobal \+ 0
-00090410  .*15 R_SPARC_JMP_SLOT  00080834   foo \+ 0
+ Offset +Info +Type +Sym.*
+0009040c +.*15 R_SPARC_JMP_SLOT +00080814 +sglobal \+ 0
+00090410 +.*15 R_SPARC_JMP_SLOT +00080834 +foo \+ 0
 
 Relocation section '\.rela\.text' at offset .* contains 3 entries:
- Offset     Info    Type            Sym\.Value  Sym\. Name \+ Addend
-00080c04  .*07 R_SPARC_WDISP30   00080800   \.plt \+ 34
-00080c0c  .*07 R_SPARC_WDISP30   00080c24   sexternal \+ 0
-00080c14  .*07 R_SPARC_WDISP30   00080800   \.plt \+ 14
+ Offset +Info +Type +Sym.*
+00080c04 +.*07 R_SPARC_WDISP30 +00080800 +\.plt \+ 34
+00080c0c +.*07 R_SPARC_WDISP30 +00080c24 +sexternal \+ 0
+00080c14 +.*07 R_SPARC_WDISP30 +00080800 +\.plt \+ 14
 
 Relocation section '\.rela\.plt\.unloaded' at offset .* contains 8 entries:
- Offset     Info    Type            Sym\.Value  Sym\. Name \+ Addend
-00080800  .*09 R_SPARC_HI22      00090400   _GLOBAL_OFFSET_TABLE_ \+ 8
-00080804  .*0c R_SPARC_LO10      00090400   _GLOBAL_OFFSET_TABLE_ \+ 8
-00080814  .*09 R_SPARC_HI22      00090400   _GLOBAL_OFFSET_TABLE_ \+ c
-00080818  .*0c R_SPARC_LO10      00090400   _GLOBAL_OFFSET_TABLE_ \+ c
-0009040c  .*03 R_SPARC_32        00080800   _PROCEDURE_LINKAGE_TAB.* \+ 28
-00080834  .*09 R_SPARC_HI22      00090400   _GLOBAL_OFFSET_TABLE_ \+ 10
-00080838  .*0c R_SPARC_LO10      00090400   _GLOBAL_OFFSET_TABLE_ \+ 10
-00090410  .*03 R_SPARC_32        00080800   _PROCEDURE_LINKAGE_TAB.* \+ 48
+ Offset +Info +Type +Sym.*
+00080800 +.*09 R_SPARC_HI22 +00090400 +_GLOBAL_OFFSET_TABLE_ \+ 8
+00080804 +.*0c R_SPARC_LO10 +00090400 +_GLOBAL_OFFSET_TABLE_ \+ 8
+00080814 +.*09 R_SPARC_HI22 +00090400 +_GLOBAL_OFFSET_TABLE_ \+ c
+00080818 +.*0c R_SPARC_LO10 +00090400 +_GLOBAL_OFFSET_TABLE_ \+ c
+0009040c +.*03 R_SPARC_32 +00080800 +_PROCEDURE_LINKAGE_TABLE_ \+ 28
+00080834 +.*09 R_SPARC_HI22 +00090400 +_GLOBAL_OFFSET_TABLE_ \+ 10
+00080838 +.*0c R_SPARC_LO10 +00090400 +_GLOBAL_OFFSET_TABLE_ \+ 10
+00090410 +.*03 R_SPARC_32 +00080800 +_PROCEDURE_LINKAGE_TABLE_ \+ 48