Remove cache miss test from all but one AMO test

This doesn't reduce coverage for cache-based RV64 systems, but will
improve test runtime and work around the need for smaller test footprint
for scratchpad-based RV32 systems.

I would argue that these microarchitectural tests should be in the
domain of torture, and that the last one should be removed, too.

diff --git a/isa/rv64ua/amoadd_d.S b/isa/rv64ua/amoadd_d.S
index c356beda9873e247065d06acc7e2852fbb8962cb..05b2f38ad047b8f0b39d38a862de6d471df81199 100644 (file)
--- a/isa/rv64ua/amoadd_d.S
+++ b/isa/rv64ua/amoadd_d.S
@@ -18,13 +18,6 @@ RVTEST_CODE_BEGIN
     li a1, 0xfffffffffffff800; \
     la a3, amo_operand; \
     sd a0, 0(a3); \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
     amoadd.d   a4, a1, 0(a3); \
   )
 
@@ -32,15 +25,6 @@ RVTEST_CODE_BEGIN
 
   # try again after a cache miss
   TEST_CASE(4, a4, 0xffffffff7ffff800, \
-    li  a4, 16384; \
-    add a5, a3, a4; \
-    ld  x0, 0(a5); \
-    add a5, a5, a4; \
-    ld  x0, 0(a5); \
-    add a5, a5, a4; \
-    ld  x0, 0(a5); \
-    add a5, a5, a4; \
-    ld  x0, 0(a5); \
     amoadd.d a4, a1, 0(a3); \
   )
 
@@ -61,4 +45,3 @@ RVTEST_DATA_END
   .align 3
 amo_operand:
   .dword 0
-  .skip 65536

diff --git a/isa/rv64ua/amoadd_w.S b/isa/rv64ua/amoadd_w.S
index b3d1953fb325d13211a2331da05489624ea99e39..d076d45772828f280b340dbfdfd69a0c25fd00c3 100644 (file)
--- a/isa/rv64ua/amoadd_w.S
+++ b/isa/rv64ua/amoadd_w.S
@@ -18,13 +18,6 @@ RVTEST_CODE_BEGIN
     li a1, 0xfffffffffffff800; \
     la a3, amo_operand; \
     sw a0, 0(a3); \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
     amoadd.w   a4, a1, 0(a3); \
   )
 
@@ -33,15 +26,6 @@ RVTEST_CODE_BEGIN
   # try again after a cache miss
   TEST_CASE(4, a4, 0x000000007ffff800, \
     li  a1, 0xffffffff80000000; \
-    li  a4, 16384; \
-    add a5, a3, a4; \
-    lw  x0, 0(a5); \
-    add a5, a5, a4; \
-    lw  x0, 0(a5); \
-    add a5, a5, a4; \
-    lw  x0, 0(a5); \
-    add a5, a5, a4; \
-    lw  x0, 0(a5); \
     amoadd.w a4, a1, 0(a3); \
   )
 
@@ -62,4 +46,3 @@ RVTEST_DATA_END
     .align 3
 amo_operand:
     .dword 0
-    .skip 65536

diff --git a/isa/rv64ua/amoand_d.S b/isa/rv64ua/amoand_d.S
index 13019ae64ce9ac4481934a796e95bd96aecb5705..c1148c033ce9cdbf1c05975b88956e1a3835d35a 100644 (file)
--- a/isa/rv64ua/amoand_d.S
+++ b/isa/rv64ua/amoand_d.S
@@ -18,13 +18,6 @@ RVTEST_CODE_BEGIN
     li a1, 0xfffffffffffff800; \
     la a3, amo_operand; \
     sd a0, 0(a3); \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
     amoand.d   a4, a1, 0(a3); \
   )
 
@@ -33,15 +26,6 @@ RVTEST_CODE_BEGIN
   # try again after a cache miss
   TEST_CASE(4, a4, 0xffffffff80000000, \
     li  a1, 0x0000000080000000; \
-    li  a4, 16384; \
-    add a5, a3, a4; \
-    ld  x0, 0(a5); \
-    add a5, a5, a4; \
-    ld  x0, 0(a5); \
-    add a5, a5, a4; \
-    ld  x0, 0(a5); \
-    add a5, a5, a4; \
-    ld  x0, 0(a5); \
     amoand.d a4, a1, 0(a3); \
   )
 
@@ -62,4 +46,3 @@ RVTEST_DATA_END
   .align 3
 amo_operand:
   .dword 0
-  .skip 65536

diff --git a/isa/rv64ua/amoand_w.S b/isa/rv64ua/amoand_w.S
index d8f888a6f591e6ec8ad9fa81d3c99b07bbd945cb..7fe3bd0ee7f4dcb2c01f94d8c4ff800ec7538cd9 100644 (file)
--- a/isa/rv64ua/amoand_w.S
+++ b/isa/rv64ua/amoand_w.S
@@ -18,13 +18,6 @@ RVTEST_CODE_BEGIN
     li a1, 0xfffffffffffff800; \
     la a3, amo_operand; \
     sw a0, 0(a3); \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
     amoand.w   a4, a1, 0(a3); \
   )
 
@@ -33,15 +26,6 @@ RVTEST_CODE_BEGIN
   # try again after a cache miss
   TEST_CASE(4, a4, 0xffffffff80000000, \
     li  a1, 0x0000000080000000; \
-    li  a4, 16384; \
-    add a5, a3, a4; \
-    lw  x0, 0(a5); \
-    add a5, a5, a4; \
-    lw  x0, 0(a5); \
-    add a5, a5, a4; \
-    lw  x0, 0(a5); \
-    add a5, a5, a4; \
-    lw  x0, 0(a5); \
     amoand.w a4, a1, 0(a3); \
   )
 
@@ -62,4 +46,3 @@ RVTEST_DATA_END
   .align 3
 amo_operand:
   .dword 0
-  .skip 65536

diff --git a/isa/rv64ua/amomax_d.S b/isa/rv64ua/amomax_d.S
index ea7e2d3a3f502e910ce33c83ecbe32682eb9b8a0..b7f8703ab2ac3935a7054b4b27b6b99c8180ddc1 100644 (file)
--- a/isa/rv64ua/amomax_d.S
+++ b/isa/rv64ua/amomax_d.S
@@ -46,4 +46,3 @@ RVTEST_DATA_END
   .align 3
 amo_operand:
   .dword 0
-  .skip 65536

diff --git a/isa/rv64ua/amomax_w.S b/isa/rv64ua/amomax_w.S
index b3adbf0ce01589f870c46b3c2f8c1cc25b6d94f1..f98620557a6fba5a759304436d458f1c4636d51e 100644 (file)
--- a/isa/rv64ua/amomax_w.S
+++ b/isa/rv64ua/amomax_w.S
@@ -46,4 +46,3 @@ RVTEST_DATA_END
   .align 3
 amo_operand:
   .dword 0
-  .skip 65536

diff --git a/isa/rv64ua/amomaxu_d.S b/isa/rv64ua/amomaxu_d.S
index b340873e7ea547a60dbd60df33b0654e1eccb925..227ac4cbba53d6413952794be7706e6682bb53a6 100644 (file)
--- a/isa/rv64ua/amomaxu_d.S
+++ b/isa/rv64ua/amomaxu_d.S
@@ -46,4 +46,3 @@ RVTEST_DATA_END
   .align 3
 amo_operand:
   .dword 0
-  .skip 65536

diff --git a/isa/rv64ua/amomaxu_w.S b/isa/rv64ua/amomaxu_w.S
index 41346d1aa7262f29594599f0cd5b847939dbdb8a..eb27d07794d5bbcef60a0cbd345fcae4f7906d88 100644 (file)
--- a/isa/rv64ua/amomaxu_w.S
+++ b/isa/rv64ua/amomaxu_w.S
@@ -46,4 +46,3 @@ RVTEST_DATA_END
   .align 3
 amo_operand:
   .dword 0
-  .skip 65536

diff --git a/isa/rv64ua/amomin_d.S b/isa/rv64ua/amomin_d.S
index e6febbb549838b1f41bb8cb4a0cafcaeffdda5be..ee6bbf39616ebbe88edb262c0a794b1fdd8520c0 100644 (file)
--- a/isa/rv64ua/amomin_d.S
+++ b/isa/rv64ua/amomin_d.S
@@ -46,4 +46,3 @@ RVTEST_DATA_END
   .align 3
 amo_operand:
   .dword 0
-  .skip 65536

diff --git a/isa/rv64ua/amomin_w.S b/isa/rv64ua/amomin_w.S
index 96b547bde3599932f9bb5fd78d7894fad0cdf4eb..1337d2ce306935021315254b69bc666f618f458e 100644 (file)
--- a/isa/rv64ua/amomin_w.S
+++ b/isa/rv64ua/amomin_w.S
@@ -46,4 +46,3 @@ RVTEST_DATA_END
   .align 3
 amo_operand:
   .dword 0
-  .skip 65536

diff --git a/isa/rv64ua/amominu_d.S b/isa/rv64ua/amominu_d.S
index a1013f3374d0aaace0616141001644898113c9ad..08bfb5be84b6e29a6465edbf9bbe7c8341cfee23 100644 (file)
--- a/isa/rv64ua/amominu_d.S
+++ b/isa/rv64ua/amominu_d.S
@@ -46,4 +46,4 @@ RVTEST_DATA_END
   .align 3
 amo_operand:
   .dword 0
-  .skip 65536
+  

diff --git a/isa/rv64ua/amominu_w.S b/isa/rv64ua/amominu_w.S
index 0a9e265a0de73a92e2d6cfde8393d63a61b9b78e..f45f856e6601335bafacb766d58c48a2926f2bb5 100644 (file)
--- a/isa/rv64ua/amominu_w.S
+++ b/isa/rv64ua/amominu_w.S
@@ -46,4 +46,4 @@ RVTEST_DATA_END
   .align 3
 amo_operand:
   .dword 0
-  .skip 65536
+  

diff --git a/isa/rv64ua/amoor_d.S b/isa/rv64ua/amoor_d.S
index 507e8777492920c1a961340007d0744d4f1dc490..6f7149526c0bf3d976758d0aa182dc3fba4d2a9e 100644 (file)
--- a/isa/rv64ua/amoor_d.S
+++ b/isa/rv64ua/amoor_d.S
@@ -18,13 +18,6 @@ RVTEST_CODE_BEGIN
     li a1, 0xfffffffffffff800; \
     la a3, amo_operand; \
     sd a0, 0(a3); \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
     amoor.d    a4, a1, 0(a3); \
   )
 
@@ -33,15 +26,6 @@ RVTEST_CODE_BEGIN
   # try again after a cache miss
   TEST_CASE(4, a4, 0xfffffffffffff800, \
     li  a1, 1; \
-    li  a4, 16384; \
-    add a5, a3, a4; \
-    ld  x0, 0(a5); \
-    add a5, a5, a4; \
-    ld  x0, 0(a5); \
-    add a5, a5, a4; \
-    ld  x0, 0(a5); \
-    add a5, a5, a4; \
-    ld  x0, 0(a5); \
     amoor.d a4, a1, 0(a3); \
   )
 
@@ -62,4 +46,3 @@ RVTEST_DATA_END
   .align 3
 amo_operand:
   .dword 0
-  .skip 65536

diff --git a/isa/rv64ua/amoor_w.S b/isa/rv64ua/amoor_w.S
index c0a1c6932fa053422f9f236b62d81e76361cfa7a..e64b8c28103fdab2991bf88a065773d36f21519e 100644 (file)
--- a/isa/rv64ua/amoor_w.S
+++ b/isa/rv64ua/amoor_w.S
@@ -18,13 +18,6 @@ RVTEST_CODE_BEGIN
     li a1, 0xfffffffffffff800; \
     la a3, amo_operand; \
     sw a0, 0(a3); \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
     amoor.w    a4, a1, 0(a3); \
   )
 
@@ -33,15 +26,6 @@ RVTEST_CODE_BEGIN
   # try again after a cache miss
   TEST_CASE(4, a4, 0xfffffffffffff800, \
     li  a1, 1; \
-    li  a4, 16384; \
-    add a5, a3, a4; \
-    lw  x0, 0(a5); \
-    add a5, a5, a4; \
-    lw  x0, 0(a5); \
-    add a5, a5, a4; \
-    lw  x0, 0(a5); \
-    add a5, a5, a4; \
-    lw  x0, 0(a5); \
     amoor.w a4, a1, 0(a3); \
   )
 
@@ -62,4 +46,3 @@ RVTEST_DATA_END
   .align 3
 amo_operand:
   .dword 0
-  .skip 65536

diff --git a/isa/rv64ua/amoswap_d.S b/isa/rv64ua/amoswap_d.S
index 628f53792d3f14214e9ea2fdfba5db97a7c32408..6b07d74409932122c66c17b076f90858932c627b 100644 (file)
--- a/isa/rv64ua/amoswap_d.S
+++ b/isa/rv64ua/amoswap_d.S
@@ -18,13 +18,6 @@ RVTEST_CODE_BEGIN
     li a1, 0xfffffffffffff800; \
     la a3, amo_operand; \
     sd a0, 0(a3); \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
     amoswap.d  a4, a1, 0(a3); \
   )
 
@@ -33,15 +26,6 @@ RVTEST_CODE_BEGIN
   # try again after a cache miss
   TEST_CASE(4, a4, 0xfffffffffffff800, \
     li  a1, 0x0000000080000000; \
-    li  a4, 16384; \
-    add a5, a3, a4; \
-    ld  x0, 0(a5); \
-    add a5, a5, a4; \
-    ld  x0, 0(a5); \
-    add a5, a5, a4; \
-    ld  x0, 0(a5); \
-    add a5, a5, a4; \
-    ld  x0, 0(a5); \
     amoswap.d a4, a1, 0(a3); \
   )
 
@@ -62,4 +46,3 @@ RVTEST_DATA_END
   .align 3
 amo_operand:
   .dword 0
-  .skip 65536

diff --git a/isa/rv64ua/amoswap_w.S b/isa/rv64ua/amoswap_w.S
index c09b8660652637b7e04506cc06872d6b8aa908e9..c4276dcacf4acf2e912332c1b61ae7ed299ca63b 100644 (file)
--- a/isa/rv64ua/amoswap_w.S
+++ b/isa/rv64ua/amoswap_w.S
@@ -18,13 +18,6 @@ RVTEST_CODE_BEGIN
     li a1, 0xfffffffffffff800; \
     la a3, amo_operand; \
     sw a0, 0(a3); \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
     amoswap.w  a4, a1, 0(a3); \
   )
 
@@ -33,15 +26,6 @@ RVTEST_CODE_BEGIN
   # try again after a cache miss
   TEST_CASE(4, a4, 0xfffffffffffff800, \
     li  a1, 0x0000000080000000; \
-    li  a4, 16384; \
-    add a5, a3, a4; \
-    lw  x0, 0(a5); \
-    add a5, a5, a4; \
-    lw  x0, 0(a5); \
-    add a5, a5, a4; \
-    lw  x0, 0(a5); \
-    add a5, a5, a4; \
-    lw  x0, 0(a5); \
     amoswap.w a4, a1, 0(a3); \
   )
 
@@ -62,4 +46,3 @@ RVTEST_DATA_END
   .align 3
 amo_operand:
   .dword 0
-  .skip 65536

diff --git a/isa/rv64ua/amoxor_w.S b/isa/rv64ua/amoxor_w.S
index 1b305ddb7e8b6249df84b2c058421e8bdf80fdca..1b6fc48f978295ee0ea257669ca896b43e3cc7d1 100644 (file)
--- a/isa/rv64ua/amoxor_w.S
+++ b/isa/rv64ua/amoxor_w.S
@@ -18,13 +18,6 @@ RVTEST_CODE_BEGIN
     li a1, 0xfffffffffffff800; \
     la a3, amo_operand; \
     sw a0, 0(a3); \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
-    nop; nop; nop; nop; \
     amoxor.w   a4, a1, 0(a3); \
   )
 
@@ -33,15 +26,6 @@ RVTEST_CODE_BEGIN
   # try again after a cache miss
   TEST_CASE(4, a4, 0x7ffff800, \
     li  a1, 0xc0000001; \
-    li  a4, 16384; \
-    add a5, a3, a4; \
-    lw  x0, 0(a5); \
-    add a5, a5, a4; \
-    lw  x0, 0(a5); \
-    add a5, a5, a4; \
-    lw  x0, 0(a5); \
-    add a5, a5, a4; \
-    lw  x0, 0(a5); \
     amoxor.w a4, a1, 0(a3); \
   )
 
@@ -62,4 +46,3 @@ RVTEST_DATA_END
   .align 3
 amo_operand:
   .dword 0
-  .skip 65536