sim: Replace any getDTBPtr/getITBPtr usage
authorGiacomo Travaglini <giacomo.travaglini@arm.com>
Sun, 13 Sep 2020 11:53:05 +0000 (12:53 +0100)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Tue, 27 Oct 2020 16:45:33 +0000 (16:45 +0000)
JIRA: https://gem5.atlassian.net/browse/GEM5-790

Change-Id: Ibd78bef263d186889f4533583ff30f46a0a8643f
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34981
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
src/sim/mem_state.cc

index bcfab78597d6bdf9f97446e449efe2a29aa67dc7..7adee590a3cfec2a31572dbea2a07e14ac90af1d 100644 (file)
@@ -30,7 +30,7 @@
 
 #include <cassert>
 
-#include "arch/generic/tlb.hh"
+#include "arch/generic/mmu.hh"
 #include "debug/Vma.hh"
 #include "mem/se_translating_port_proxy.hh"
 #include "sim/process.hh"
@@ -258,8 +258,7 @@ MemState::unmapRegion(Addr start_addr, Addr length)
      * that can flush just part of the address space.
      */
     for (auto *tc: _ownerProcess->system->threads) {
-        tc->getDTBPtr()->flushAll();
-        tc->getITBPtr()->flushAll();
+        tc->getMMUPtr()->flushAll();
     }
 
     do {
@@ -360,8 +359,7 @@ MemState::remapRegion(Addr start_addr, Addr new_start_addr, Addr length)
      * that can flush just part of the address space.
      */
     for (auto *tc: _ownerProcess->system->threads) {
-        tc->getDTBPtr()->flushAll();
-        tc->getITBPtr()->flushAll();
+        tc->getMMUPtr()->flushAll();
     }
 
     do {