(no commit message)

diff --git a/simple_v_extension/abridged_spec.mdwn b/simple_v_extension/abridged_spec.mdwn
index e83c0de81cb25b4bc09015200df3ec153bab0eba..f2dff669e549aa8844302539532336257e09a5f8 100644 (file)
--- a/simple_v_extension/abridged_spec.mdwn
+++ b/simple_v_extension/abridged_spec.mdwn
@@ -20,7 +20,7 @@ following order:
 * VBLOCK sub-execution context (PCVBLK increments whilst PC is paused).
 * VL element loops (STATE srcoffs and destoffs increment, PC and PCVBLK pause).
   Predication bits may be individually applied per element.
-* SUBVL element loops (STATE svsrcoffs/svdestoffs increment, VL pauses).
+* SUBVL element loops (STATE svdestoffs increments, VL pauses).
   Individual predicate bits from VL loops apply to the *group* of SUBVL
   elements.