struct LowerX86 : public FunctionPass
{
- LowerX86(JitManager* pJitMgr = nullptr, Builder* b = nullptr)
- : FunctionPass(ID), mpJitMgr(pJitMgr), B(b)
+ LowerX86(Builder* b = nullptr)
+ : FunctionPass(ID), B(b)
{
initializeLowerX86Pass(*PassRegistry::getPassRegistry());
// Determine target arch
- if (mpJitMgr->mArch.AVX512F())
+ if (JM()->mArch.AVX512F())
{
mTarget = AVX512;
}
- else if (mpJitMgr->mArch.AVX2())
+ else if (JM()->mArch.AVX2())
{
mTarget = AVX2;
}
- else if (mpJitMgr->mArch.AVX())
+ else if (JM()->mArch.AVX())
{
mTarget = AVX;
{
}
- JitManager* JM() { return mpJitMgr; }
+ JitManager* JM() { return B->JM(); }
- JitManager* mpJitMgr;
Builder* B;
TargetArch mTarget;
char LowerX86::ID = 0; // LLVM uses address of ID as the actual ID.
- FunctionPass* createLowerX86Pass(JitManager* pJitMgr, Builder* b)
+ FunctionPass* createLowerX86Pass(Builder* b)
{
- return new LowerX86(pJitMgr, b);
+ return new LowerX86(b);
}
Instruction* NO_EMU(LowerX86* pThis, TargetArch arch, TargetWidth width, CallInst* pCallInst)
// after the gallivm passes, we have to lower the core's intrinsics
llvm::legacy::FunctionPassManager lowerPass(JM()->mpCurrentModule);
- lowerPass.add(createLowerX86Pass(mpJitMgr, this));
+ lowerPass.add(createLowerX86Pass(this));
lowerPass.run(*pFunction);
PFN_PIXEL_KERNEL kernel =