platforms/kcu105: change internal vref to 0.84v (recommended value for ddr4)

diff --git a/litex/boards/platforms/kcu105.py b/litex/boards/platforms/kcu105.py
index 53a6dd6de3d72f47a55517d45799ac61dd8dee88..5cb7c42691098892ac68d5b5d3907bb41d3c3c0f 100644 (file)
--- a/litex/boards/platforms/kcu105.py
+++ b/litex/boards/platforms/kcu105.py
@@ -486,6 +486,6 @@ class Platform(XilinxPlatform):
 
     def do_finalize(self, fragment):
         XilinxPlatform.do_finalize(self, fragment)
-        self.add_platform_command("set_property INTERNAL_VREF {{0.60}} [get_iobanks 44]")
-        self.add_platform_command("set_property INTERNAL_VREF {{0.60}} [get_iobanks 45]")
-        self.add_platform_command("set_property INTERNAL_VREF {{0.60}} [get_iobanks 46]")
+        self.add_platform_command("set_property INTERNAL_VREF {{0.84}} [get_iobanks 44]")
+        self.add_platform_command("set_property INTERNAL_VREF {{0.84}} [get_iobanks 45]")
+        self.add_platform_command("set_property INTERNAL_VREF {{0.84}} [get_iobanks 46]")