x86: Process ImmExt without operands

To support Intel AMX instructions with 8-bit immediate opcode extension,
but without operands:

tilerelease, 0, 0x49, 0xc0, 1, CpuAMX_TILE|Cpu64, Vex|VexOpcode=1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 }

process ImmExt without operands.

	* config/tc-i386.c (md_assemble): Process ImmExt without
	operands.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index a5ffe08eb4d41bb298096332318b2f3d13760bb0..af34ad85ae137bc17efd87819bacdf471991eece 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2020-06-26  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * config/tc-i386.c (md_assemble): Process ImmExt without
+       operands.
+
 2020-06-26  H.J. Lu  <hongjiu.lu@intel.com>
 
        * config/tc-i386.c (check_VecOperands): Replace vecsib with sib.

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index bae9680515622c89b7ab6b71b48f3aa61ddbdaae..ae2a2c1a5367aff595b94799077da3f63af0edfb 100644 (file)
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -4873,8 +4873,12 @@ md_assemble (char *line)
       if (!process_operands ())
        return;
     }
-  else if (!quiet_warnings && i.tm.opcode_modifier.ugh)
+  else
     {
+      if (i.tm.opcode_modifier.immext)
+       process_immext ();
+
+      if (!quiet_warnings && i.tm.opcode_modifier.ugh)
       /* UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc.  */
       as_warn (_("translating to `%sp'"), i.tm.name);
     }