i965: Use a line end cap width of 0.5 unless smooth lines enabled.
authorKenneth Graunke <kenneth@whitecape.org>
Wed, 10 May 2017 09:45:53 +0000 (02:45 -0700)
committerKenneth Graunke <kenneth@whitecape.org>
Wed, 14 Jun 2017 22:56:21 +0000 (15:56 -0700)
This updates the Gen4-5 code to use a line end cap width of 0.5
for non-smooth lines, and 1.0 for smooth lines - which is what we
do on Gen6+.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
src/mesa/drivers/dri/i965/brw_sf_state.c

index 78ed71e1ba9ad75fee33782ed86715a5494fa7bc..0c3cbce2d2000d0ea8a67dd78c87c08f61358b82 100644 (file)
@@ -126,9 +126,10 @@ static void upload_sf_unit( struct brw_context *brw )
    /* _NEW_LINE */
    sf->sf6.line_width = U_FIXED(brw_get_line_width(brw), 1);
 
-   sf->sf6.line_endcap_aa_region_width = 1;
-   if (ctx->Line.SmoothFlag)
+   if (ctx->Line.SmoothFlag) {
       sf->sf6.aa_enable = 1;
+      sf->sf6.line_endcap_aa_region_width = 1;
+   }
 
    sf->sf6.point_rast_rule = BRW_RASTRULE_UPPER_RIGHT;