radeon/r200: OQ support for r200 in theory.
authorDave Airlie <airlied@linux.ie>
Wed, 26 Aug 2009 04:03:48 +0000 (14:03 +1000)
committerDave Airlie <airlied@linux.ie>
Wed, 26 Aug 2009 04:03:48 +0000 (14:03 +1000)
this is an untested port of the r100 OQ code

src/mesa/drivers/dri/r200/r200_context.c
src/mesa/drivers/dri/r200/r200_context.h
src/mesa/drivers/dri/r200/r200_state_init.c

index d2594d7d161e9144190f5b993feab8a523945dd2..74564d6261fa3ce3584c7f08c7798397a07a9dc5 100644 (file)
@@ -60,9 +60,11 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r200_tcl.h"
 #include "r200_maos.h"
 #include "r200_vertprog.h"
+#include "radeon_queryobj.h"
 
 #include "radeon_span.h"
 
+#define need_GL_ARB_occlusion_query
 #define need_GL_ARB_vertex_program
 #define need_GL_ATI_fragment_shader
 #define need_GL_EXT_blend_minmax
@@ -116,6 +118,7 @@ static const GLubyte *r200GetString( GLcontext *ctx, GLenum name )
 const struct dri_extension card_extensions[] =
 {
     { "GL_ARB_multitexture",               NULL },
+    { "GL_ARB_occlusion_query",                   GL_ARB_occlusion_query_functions},
     { "GL_ARB_texture_border_clamp",       NULL },
     { "GL_ARB_texture_env_add",            NULL },
     { "GL_ARB_texture_env_combine",        NULL },
@@ -262,6 +265,19 @@ static void r200_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmes
 {
 }
 
+static void r200_emit_query_finish(radeonContextPtr radeon)
+{
+   BATCH_LOCALS(radeon);
+   struct radeon_query_object *query = radeon->query.current;
+
+   BEGIN_BATCH_NO_AUTOSTATE(4);
+   OUT_BATCH(CP_PACKET0(RADEON_RB3D_ZPASS_ADDR, 0));
+   OUT_BATCH_RELOC(0, query->bo, query->curr_offset, 0, RADEON_GEM_DOMAIN_GTT, 0);
+   END_BATCH();
+   query->curr_offset += sizeof(uint32_t);
+   assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
+   query->emitted_begin = GL_FALSE;
+}
 
 static void r200_init_vtbl(radeonContextPtr radeon)
 {
@@ -271,6 +287,7 @@ static void r200_init_vtbl(radeonContextPtr radeon)
    radeon->vtbl.swtcl_flush = r200_swtcl_flush;
    radeon->vtbl.fallback = r200Fallback;
    radeon->vtbl.update_scissor = r200_vtbl_update_scissor;
+   radeon->vtbl.emit_query_finish = r200_emit_query_finish;
 }
 
 
@@ -458,6 +475,9 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
       driInitSingleExtension( ctx, ATI_fs_extension );
    if (rmesa->radeon.radeonScreen->drmSupportsPointSprites)
       driInitExtensions( ctx, point_extensions, GL_FALSE );
+
+   if (!rmesa->radeon.radeonScreen->kernel_mm)
+      _mesa_disable_extension(ctx, "GL_ARB_occlusion_query");
 #if 0
    r200InitDriverFuncs( ctx );
    r200InitIoctlFuncs( ctx );
index c1cb0dd20c779242b37e9c7b9c00b033f29f03bc..e26514b27a9e018149c4eeb1ffd20fc0e6257e74 100644 (file)
@@ -475,6 +475,9 @@ struct r200_texture_state {
 #define SCI_XY_2          5
 #define SCI_STATE_SIZE    6
 
+#define R200_QUERYOBJ_CMD_0  0
+#define R200_QUERYOBJ_DATA_0 1
+#define R200_QUERYOBJ_CMDSIZE  2
 
 struct r200_hw_state {
    /* Hardware state, stored as cmdbuf commands:  
index 42d66258c3c5c07e0d64cbf72e594245d47bef1a..4c484d067ee1344041cab41c1b4a7db99253e8df 100644 (file)
@@ -51,6 +51,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r200_tcl.h"
 #include "r200_tex.h"
 #include "r200_swtcl.h"
+#include "radeon_queryobj.h"
 
 #include "xmlpool.h"
 
@@ -1596,6 +1597,12 @@ void r200InitState( r200ContextPtr rmesa )
 
    r200LightingSpaceChange( ctx );
 
+   if (rmesa->radeon.radeonScreen->kernel_mm) {
+      radeon_init_query_stateobj(&rmesa->radeon, R200_QUERYOBJ_CMDSIZE);
+      rmesa->radeon.query.queryobj.cmd[R200_QUERYOBJ_CMD_0] = CP_PACKET0(RADEON_RB3D_ZPASS_DATA, 0);
+      rmesa->radeon.query.queryobj.cmd[R200_QUERYOBJ_DATA_0] = 0;
+   }
+
    rmesa->radeon.hw.all_dirty = GL_TRUE;
 
    rcommonInitCmdBuf(&rmesa->radeon);