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diff --git a/openpower/sv/remap.mdwn b/openpower/sv/remap.mdwn
index 5bf81df421683fb0f6415e0fa5d10e8db1e05960..4d50fc14e46d55baf59559b9cafb998c73794ed8 100644 (file)
--- a/openpower/sv/remap.mdwn
+++ b/openpower/sv/remap.mdwn
@@ -40,7 +40,8 @@ literally any instruction: CRs, Arithmetic, Logical, LD/ST, anything.
 
 When SUBVL is greater than 1 a given group of Subvector
 elements are kept together: effectively the group becomes the
-element, and the group is REMAPed together.
+element, and with REMAP applying to elements
+(not sub-elements) each group is REMAPed together.
 Swizzle *can* however be applied to the same
 instruction as REMAP, providing re-sequencing of
 Subvector elements which REMAP cannot. Also as explained in [[sv/mv.swizzle]], [[sv/mv.vec]] and the [[svp64/appendix]], Pack and Unpack Mode bits