}
void
-iris_batch_init(struct iris_batch *batch,
+iris_init_batch(struct iris_batch *batch,
struct iris_screen *screen,
- struct pipe_debug_callback *dbg)
+ struct pipe_debug_callback *dbg,
+ uint8_t ring)
{
batch->screen = screen;
batch->dbg = dbg;
+ assert((ring & ~I915_EXEC_RING_MASK) == 0);
+ batch->ring = ring;
+
init_reloc_list(&batch->cmdbuf.relocs, 256);
init_reloc_list(&batch->statebuf.relocs, 256);
.buffer_count = batch->exec_count,
.batch_start_offset = 0,
.batch_len = buffer_bytes_used(&batch->cmdbuf),
- .flags = I915_EXEC_NO_RELOC |
+ .flags = batch->ring |
+ I915_EXEC_NO_RELOC |
I915_EXEC_BATCH_FIRST |
- I915_EXEC_HANDLE_LUT |
- I915_EXEC_RENDER,
+ I915_EXEC_HANDLE_LUT,
.rsvd1 = batch->hw_ctx_id, /* rsvd1 is actually the context ID */
};
uint32_t hw_ctx_id;
+ /** Which ring this batch targets - a I915_EXEC_RING_MASK value */
+ uint8_t ring;
+
bool no_wrap;
/** The validation list */
struct hash_table *state_sizes;
};
-void iris_batch_init(struct iris_batch *batch,
+void iris_init_batch(struct iris_batch *batch,
struct iris_screen *screen,
- struct pipe_debug_callback *dbg);
+ struct pipe_debug_callback *dbg,
+ uint8_t ring);
void iris_batch_free(struct iris_batch *batch);
void iris_require_command_space(struct iris_batch *batch, unsigned size);
void iris_require_state_space(struct iris_batch *batch, unsigned size);
#include "util/u_inlines.h"
#include "util/u_format.h"
#include "util/u_upload_mgr.h"
+#include "i915_drm.h"
#include "iris_context.h"
#include "iris_resource.h"
#include "iris_screen.h"
iris_init_program_cache(ice);
- iris_batch_init(&ice->render_batch, screen, &ice->dbg);
+ iris_init_batch(&ice->render_batch, screen, &ice->dbg, I915_EXEC_RENDER);
return ctx;
}