nv50: add support for MUL_ZERO_WINS property
authorIlia Mirkin <imirkin@alum.mit.edu>
Sat, 14 Jan 2017 23:55:25 +0000 (18:55 -0500)
committerIlia Mirkin <imirkin@alum.mit.edu>
Tue, 24 Jan 2017 01:37:14 +0000 (20:37 -0500)
This is simply keyed off the vertex shader, as that's guaranteed to be
present in any pipeline.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
src/gallium/drivers/nouveau/nv50/nv50_program.c
src/gallium/drivers/nouveau/nv50/nv50_program.h
src/gallium/drivers/nouveau/nv50/nv50_screen.c
src/gallium/drivers/nouveau/nv50/nv50_screen.h
src/gallium/drivers/nouveau/nv50/nv50_vbo.c

index ea5febdf3aef73a589ba4f56ba75533cae22d38d..76d06aeddfef14caf546075f25a6d6b63e93263e 100644 (file)
@@ -380,7 +380,7 @@ nv50_program_translate(struct nv50_program *prog, uint16_t chipset,
    prog->interps = info->bin.fixupData;
    prog->max_gpr = MAX2(4, (info->bin.maxGPR >> 1) + 1);
    prog->tls_space = info->bin.tlsSpace;
-
+   prog->mul_zero_wins = info->io.mul_zero_wins;
    prog->vp.need_vertex_id = info->io.vertexId < PIPE_MAX_SHADER_INPUTS;
 
    prog->vp.clip_enable = (1 << info->io.clipDistances) - 1;
index 009d41f15626dd65f01ebb7e1603e84155b2569e..2b45b09f01eadf4a8bdc2c1a43f5b90c9eec2eb0 100644 (file)
@@ -108,6 +108,8 @@ struct nv50_program {
       unsigned num_syms;
    } cp;
 
+   bool mul_zero_wins;
+
    void *fixups; /* relocation records */
    void *interps; /* interpolation records */
 
index 12c15ad3306842958013d0067756bd4c4e5d6da9..d09b41ab3da945e1af3ac1577246c5a31e57c198 100644 (file)
@@ -198,6 +198,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_STRING_MARKER:
    case PIPE_CAP_CULL_DISTANCE:
    case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
+   case PIPE_CAP_TGSI_MUL_ZERO_WINS:
       return 1;
    case PIPE_CAP_SEAMLESS_CUBE_MAP:
       return 1; /* class_3d >= NVA0_3D_CLASS; */
@@ -259,7 +260,6 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_NATIVE_FENCE_FD:
    case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
    case PIPE_CAP_TGSI_FS_FBFETCH:
-   case PIPE_CAP_TGSI_MUL_ZERO_WINS:
       return 0;
 
    case PIPE_CAP_VENDOR_ID:
index 370d8f52f213e8d5fdc6b69069e035dabc562af7..6f3b40c37b81cf31d1da35918c316b6504461686 100644 (file)
@@ -54,6 +54,7 @@ struct nv50_graph_state {
    uint8_t prim_size;
    uint16_t scissor;
    bool seamless_cube_map;
+   bool mul_zero_wins;
 };
 
 struct nv50_screen {
index 4c46ed020a567b7a13886688fa37c976387f1cb7..227038e95a5c68ee68763c3400bf13b8b9dbc38e 100644 (file)
@@ -824,6 +824,12 @@ nv50_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info)
       PUSH_DATA (push, nv50->seamless_cube_map ? NVA0_3D_TEX_MISC_SEAMLESS_CUBE_MAP : 0);
    }
 
+   if (nv50->vertprog->mul_zero_wins != nv50->state.mul_zero_wins) {
+      nv50->state.mul_zero_wins = nv50->vertprog->mul_zero_wins;
+      BEGIN_NV04(push, NV50_3D(UNK1690), 1);
+      PUSH_DATA (push, 0x00010000 * !!nv50->state.mul_zero_wins);
+   }
+
    if (nv50->vbo_fifo) {
       nv50_push_vbo(nv50, info);
       push->kick_notify = nv50_default_kick_notify;