Fix typo in thumb_in_function_epilogue_p

This patch fixes a typo in the bit mask I've made in my previous code
refactor.  If PC is in the register list, the bit 8 is one, so bit
mask 0xff00 should be used.  Current condition is a constant false.

gdb:

2014-09-24  Yao Qi  <yao@codesourcery.com>

	* arm-tdep.c (thumb_in_function_epilogue_p): Fix typo in the
	bitmask.

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 35ecebcafd2868e1ff429239346384ddd522dd0c..0efcb7215c6eeaffee2f434f2042300e93fc3331 100644 (file)
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,8 @@
+2014-09-24  Yao Qi  <yao@codesourcery.com>
+
+       * arm-tdep.c (thumb_in_function_epilogue_p): Fix typo in the
+       bitmask.
+
 2014-09-22  Gary Benson  <gbenson@redhat.com>
 
        * target.c (target_stop): Updated comment.

diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index 5cdfc5bf4e46b4f05bdee582799608b67afc9aa2..e2559ecbd2a800487096a6a0afea16f7dbe33b9e 100644 (file)
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -3273,7 +3273,7 @@ thumb_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
        found_return = 1;
       else if (thumb_instruction_restores_sp (insn))
        {
-         if ((insn & 0xfe00) == 0xbd00)  /* pop <registers, PC> */
+         if ((insn & 0xff00) == 0xbd00)  /* pop <registers, PC> */
            found_return = 1;
        }
       else if (thumb_insn_size (insn) == 4)  /* 32-bit Thumb-2 instruction */