x86: don't default variable shift count insns to 8-bit operand size

Just like %dx in I/O instructions isn't suitable to derive operand size
information, %cl source operands of shift instructions aren't.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index d18c381843e957e5260b633cf9cdf4ee45253a8a..768ec179df5556b20a7d5e46bcee4ef0d372c7eb 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,10 @@
+2017-11-13  Jan Beulich  <jbeulich@suse.com>
+
+       * config/tc-i386.c (process_suffix): Treat .shiftcount just like
+       .inoutportreg.
+       * testsuite/gas/i386/inval.s: Add ambiguous shift/rotate cases.
+       * testsuite/gas/i386/inval.l: Adjust expectations.
+
 2017-11-13  Jan Beulich  <jbeulich@suse.com>
 
        * config/tc-i386-intel.c (i386_intel_simplify_register): Also

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 4161c8c0de5f81c80c68983ce7fb3dbd37ba851f..f20be8ef9dc07b3c5dc192be3f2a4852b4d843a7 100644 (file)
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -5431,7 +5431,8 @@ process_suffix (void)
                }
 
              for (op = i.operands; --op >= 0;)
-               if (!i.tm.operand_types[op].bitfield.inoutportreg)
+               if (!i.tm.operand_types[op].bitfield.inoutportreg
+                   && !i.tm.operand_types[op].bitfield.shiftcount)
                  {
                    if (i.types[op].bitfield.reg8)
                      {

diff --git a/gas/testsuite/gas/i386/inval.l b/gas/testsuite/gas/i386/inval.l
index bec6b754fe60954f5431b7f0547fa1061814f6ae..53eb7e7353c6a0d8841f75a21704e1a6fc3dd273 100644 (file)
--- a/gas/testsuite/gas/i386/inval.l
+++ b/gas/testsuite/gas/i386/inval.l
@@ -80,6 +80,9 @@
 .*:87: Error: .*
 .*:88: Error: .*
 .*:90: Error: .*
+.*:92: Error: .*shl.*
+.*:93: Error: .*rol.*
+.*:94: Error: .*rcl.*
 GAS LISTING .*
 
 
@@ -176,3 +179,7 @@ GAS LISTING .*
 [      ]*88[   ]+movzx eax, \[eax\]
 [      ]*89[   ]+
 [      ]*90[   ]+movnti word ptr \[eax\], ax
+[      ]*[1-9][0-9]*[  ]+
+[      ]*[1-9][0-9]*[  ]+shl \[eax\], 1
+[      ]*[1-9][0-9]*[  ]+rol \[ecx\], 2
+[      ]*[1-9][0-9]*[  ]+rcl \[edx\], cl

diff --git a/gas/testsuite/gas/i386/inval.s b/gas/testsuite/gas/i386/inval.s
index 4818baa808187e4f6b86169f123a41dee1350747..35d99cd65b7265920463bf4df7ff834f978015a8 100644 (file)
--- a/gas/testsuite/gas/i386/inval.s
+++ b/gas/testsuite/gas/i386/inval.s
@@ -88,3 +88,7 @@ movzx ax, [eax]
 movzx eax, [eax]
 
 movnti word ptr [eax], ax
+
+       shl [eax], 1
+       rol [ecx], 2
+       rcl [edx], cl