/* i386.c -- Assemble code for the Intel 80386
- Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 98, 99, 2000
+ Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
static int use_rela_relocations = 0;
/* The names used to print error messages. */
-static const char *flag_code_names[] =
+static const char *flag_code_names[] =
{
"32",
"16",
if ((overlap0 & (Imm8 | Imm8S | Imm16 | Imm32 | Imm32S))
&& overlap0 != Imm8 && overlap0 != Imm8S
&& overlap0 != Imm16 && overlap0 != Imm32S
- && overlap0 != Imm32 && overlap0 != Imm64)
+ && overlap0 != Imm32 && overlap0 != Imm64)
{
if (i.suffix)
{
overlap0 &= (i.suffix == BYTE_MNEM_SUFFIX ? (Imm8 | Imm8S) :
- (i.suffix == WORD_MNEM_SUFFIX ? Imm16 :
+ (i.suffix == WORD_MNEM_SUFFIX ? Imm16 :
(i.suffix == QWORD_MNEM_SUFFIX ? Imm64 | Imm32S : Imm32)));
}
else if (overlap0 == (Imm16 | Imm32S | Imm32)
if ((overlap1 & (Imm8 | Imm8S | Imm16 | Imm32S | Imm32))
&& overlap1 != Imm8 && overlap1 != Imm8S
&& overlap1 != Imm16 && overlap1 != Imm32S
- && overlap1 != Imm32 && overlap1 != Imm64)
+ && overlap1 != Imm32 && overlap1 != Imm64)
{
if (i.suffix)
{
overlap1 &= (i.suffix == BYTE_MNEM_SUFFIX ? (Imm8 | Imm8S) :
- (i.suffix == WORD_MNEM_SUFFIX ? Imm16 :
- (i.suffix == QWORD_MNEM_SUFFIX ? Imm64 | Imm32S : Imm32)));
+ (i.suffix == WORD_MNEM_SUFFIX ? Imm16 :
+ (i.suffix == QWORD_MNEM_SUFFIX ? Imm64 | Imm32S : Imm32)));
}
else if (overlap1 == (Imm16 | Imm32 | Imm32S)
|| overlap1 == (Imm16 | Imm32)
i.disp_reloc[this_operand] = BFD_RELOC_386_GOTOFF;
len = 6;
}
- else if (strncmp (cp + 1, "GOT", 3) == 0)
+ else if (strncmp (cp + 1, "GOTPCREL", 8) == 0)
{
if (flag_code == CODE_64BIT)
- i.disp_reloc[this_operand] = BFD_RELOC_X86_64_GOT32;
+ i.disp_reloc[this_operand] = BFD_RELOC_X86_64_GOTPCREL;
else
- i.disp_reloc[this_operand] = BFD_RELOC_386_GOT32;
- len = 3;
+ as_bad ("GOTPCREL relocations are supported only in 64bit mode.");
+ len = 8;
}
- else if (strncmp (cp + 1, "GOTPCREL", 3) == 0)
+ else if (strncmp (cp + 1, "GOT", 3) == 0)
{
if (flag_code == CODE_64BIT)
- i.disp_reloc[this_operand] = BFD_RELOC_X86_64_GOTPCREL;
+ i.disp_reloc[this_operand] = BFD_RELOC_X86_64_GOT32;
else
- as_bad ("GOTPCREL relocations are supported only in 64bit mode.");
+ i.disp_reloc[this_operand] = BFD_RELOC_386_GOT32;
len = 3;
}
else
i.disp_reloc[this_operand] = BFD_RELOC_386_GOTOFF;
len = 6;
}
+ else if (strncmp (cp + 1, "GOTPCREL", 8) == 0)
+ {
+ if (flag_code != CODE_64BIT)
+ as_bad ("GOTPCREL relocation is supported only in 64bit mode.");
+ i.disp_reloc[this_operand] = BFD_RELOC_X86_64_GOTPCREL;
+ len = 8;
+ }
else if (strncmp (cp + 1, "GOT", 3) == 0)
{
if (flag_code == CODE_64BIT)
i.disp_reloc[this_operand] = BFD_RELOC_386_GOT32;
len = 3;
}
- else if (strncmp (cp + 1, "GOTPCREL", 3) == 0)
- {
- if (flag_code != CODE_64BIT)
- as_bad ("GOTPCREL relocation is supported only in 64bit mode.");
- i.disp_reloc[this_operand] = BFD_RELOC_X86_64_GOTPCREL;
- len = 3;
- }
else
as_bad (_("bad reloc specifier in expression"));
dataType BYTE | WORD | DWORD | QWORD | XWORD
digits decdigit
- | digits decdigit
- | digits hexdigit
+ | digits decdigit
+ | digits hexdigit
decdigit [0-9]
e05 e05 addOp e06
- | e06
+ | e06
e06 e06 mulOp e09
- | e09
+ | e09
e09 OFFSET e10
| e09 PTR e10
| e10
e10 e10 [ expr ]
- | e11
+ | e11
e11 ( expr )
- | [ expr ]
+ | [ expr ]
| constant
| dataType
| id
| register
=> expr SHORT e05
- | e05
+ | e05
gpRegister AX | EAX | BX | EBX | CX | ECX | DX | EDX
- | BP | EBP | SP | ESP | DI | EDI | SI | ESI
+ | BP | EBP | SP | ESP | DI | EDI | SI | ESI
hexdigit a | b | c | d | e | f
- | A | B | C | D | E | F
+ | A | B | C | D | E | F
id alpha
- | id alpha
+ | id alpha
| id decdigit
mulOp * | / | MOD
quote " | '
register specialRegister
- | gpRegister
+ | gpRegister
| byteRegister
segmentRegister CS | DS | ES | FS | GS | SS
specialRegister CR0 | CR2 | CR3
- | DR0 | DR1 | DR2 | DR3 | DR6 | DR7
+ | DR0 | DR1 | DR2 | DR3 | DR6 | DR7
| TR3 | TR4 | TR5 | TR6 | TR7
We simplify the grammar in obvious places (e.g., register parsing is
to implement a recursive-descent parser.
expr SHORT e05
- | e05
+ | e05
e05 e06 e05'
e05' addOp e06 e05'
- | Empty
+ | Empty
e06 e09 e06'
e06' mulOp e09 e06'
- | Empty
+ | Empty
e09 OFFSET e10 e09'
- | e10 e09'
+ | e10 e09'
e09' PTR e10 e09'
- | : e10 e09'
+ | : e10 e09'
| Empty
e10 e11 e10'
e10' [ expr ] e10'
- | Empty
+ | Empty
e11 ( expr )
- | [ expr ]
+ | [ expr ]
| BYTE
| WORD
| DWORD
}
/* expr SHORT e05
- | e05 */
+ | e05 */
static int
intel_expr ()
{
/* e06 e09 e06'
e06' mulOp e09 e06'
- | Empty */
+ | Empty */
static int
intel_e06 ()
{
}
/* e09 OFFSET e10 e09'
- | e10 e09'
+ | e10 e09'
e09' PTR e10 e09'
- | : e10 e09'
+ | : e10 e09'
| Empty */
static int
intel_e09 ()
/* e10 e11 e10'
e10' [ expr ] e10'
- | Empty */
+ | Empty */
static int
intel_e10 ()
{
}
/* e11 ( expr )
- | [ expr ]
+ | [ expr ]
| BYTE
| WORD
| DWORD