{
uint32_t *ptr, *dwords;
+ memset(info, 0, sizeof(*info));
info->gpu_id = gpu_id;
info->max_reg = -1;
info->max_half_reg = -1;
info->max_const = -1;
- info->instrs_count = 0;
- info->sizedwords = 0;
- info->ss = info->sy = 0;
foreach_block (block, &shader->block_list) {
foreach_instr (instr, &block->instr_list) {
info->nops_count += instr->nop;
if (instr->opc == OPC_NOP)
info->nops_count += 1 + instr->repeat;
+ if (instr->opc == OPC_MOV) {
+ if (instr->cat1.src_type == instr->cat1.dst_type) {
+ info->mov_count += 1 + instr->repeat;
+ } else {
+ info->cov_count += 1 + instr->repeat;
+ }
+ }
dwords += 2;
if (instr->flags & IR3_INSTR_SS) {
uint16_t sizedwords;
uint16_t instrs_count; /* expanded to account for rpt's */
uint16_t nops_count; /* # of nop instructions, including nopN */
+ uint16_t mov_count;
+ uint16_t cov_count;
/* NOTE: max_reg, etc, does not include registers not touched
* by the shader (ie. vertex fetched via VFD_DECODE but not
* touched by shader)
fprintf(out, "\n");
/* print generic shader info: */
- fprintf(out, "; %s prog %d/%d: %u instr, %u nops, %u non-nops, %u dwords\n",
+ fprintf(out, "; %s prog %d/%d: %u instr, %u nops, %u non-nops, %u mov, %u cov, %u dwords\n",
type, so->shader->id, so->id,
so->info.instrs_count,
so->info.nops_count,
so->info.instrs_count - so->info.nops_count,
+ so->info.mov_count, so->info.cov_count,
so->info.sizedwords);
fprintf(out, "; %s prog %d/%d: %u last-baryf, %d half, %d full, %u constlen\n",
return;
pipe_debug_message(debug, SHADER_INFO,
- "%s shader: %u inst, %u nops, %u non-nops, %u dwords, "
- "%u last-baryf, %u half, %u full, %u constlen, "
+ "%s shader: %u inst, %u nops, %u non-nops, %u mov, %u cov, "
+ "%u dwords, %u last-baryf, %u half, %u full, %u constlen, "
"%u sstall, %u (ss), %u (sy), %d max_sun, %d loops\n",
ir3_shader_stage(v),
v->info.instrs_count,
v->info.nops_count,
v->info.instrs_count - v->info.nops_count,
+ v->info.mov_count,
+ v->info.cov_count,
v->info.sizedwords,
v->info.last_baryf,
v->info.max_half_reg + 1,