{ "notiling", DBG_NO_TILING, "Disable tiling" },
{ "switch_on_eop", DBG_SWITCH_ON_EOP, "Program WD/IA to switch on end-of-packet." },
{ "forcedma", DBG_FORCE_DMA, "Use asynchronous DMA for all operations when possible." },
+ { "precompile", DBG_PRECOMPILE, "Compile one shader variant at shader creation." },
DEBUG_NAMED_VALUE_END /* must be last */
};
#define DBG_NO_TILING (1 << 14)
#define DBG_SWITCH_ON_EOP (1 << 15)
#define DBG_FORCE_DMA (1 << 16)
+#define DBG_PRECOMPILE (1 << 17)
/* The maximum allowed bit is 20. */
#define R600_MAP_BUFFER_ALIGNMENT 64
const struct pipe_shader_state *state,
unsigned pipe_shader_type)
{
+ struct si_screen *sscreen = (struct si_screen *)ctx->screen;
struct si_shader_selector *sel = CALLOC_STRUCT(si_shader_selector);
int i;
}
}
+ if (sscreen->b.debug_flags & DBG_PRECOMPILE)
+ si_shader_select(ctx, sel);
+
return sel;
}