r300g,radeong: set tiling flags in libdrm
authorMarek Olšák <maraeo@gmail.com>
Sat, 16 Jan 2010 23:57:04 +0000 (00:57 +0100)
committerCorbin Simpson <MostAwesomeDude@gmail.com>
Mon, 25 Jan 2010 07:03:29 +0000 (23:03 -0800)
src/gallium/drivers/r300/r300_texture.c
src/gallium/winsys/drm/radeon/core/radeon_buffer.c
src/gallium/winsys/drm/radeon/core/radeon_winsys.h

index 1f73f74c2688e37da9e9c94361b897507b945539..67bf8ce13fd8a22842c0ec7cc9417736d3fbbbb8 100644 (file)
@@ -30,6 +30,8 @@
 #include "r300_texture.h"
 #include "r300_screen.h"
 
+#include "radeon_winsys.h"
+
 #define TILE_WIDTH 0
 #define TILE_HEIGHT 1
 
@@ -209,6 +211,7 @@ static struct pipe_texture*
 {
     struct r300_texture* tex = CALLOC_STRUCT(r300_texture);
     struct r300_screen* rscreen = r300_screen(screen);
+    struct radeon_winsys* winsys = (struct radeon_winsys*)screen->winsys;
 
     if (!tex) {
         return NULL;
@@ -225,6 +228,10 @@ static struct pipe_texture*
     tex->buffer = screen->buffer_create(screen, 2048,
                                         PIPE_BUFFER_USAGE_PIXEL,
                                         tex->size);
+    winsys->buffer_set_tiling(winsys, tex->buffer,
+                              tex->pitch[0],
+                              tex->microtile != R300_BUFFER_LINEAR,
+                              tex->macrotile != R300_BUFFER_LINEAR);
 
     if (!tex->buffer) {
         FREE(tex);
index b020ff38fa05e720cf7da224d96f7ab2fd6f0d6d..25e1cdcdb6daf2271905e51c0b7f7e8012f358b7 100644 (file)
@@ -202,6 +202,26 @@ static void radeon_buffer_unmap(struct pipe_winsys *ws,
     }
 }
 
+static void radeon_buffer_set_tiling(struct radeon_winsys *ws,
+                                     struct pipe_buffer *buffer,
+                                     uint32_t pitch,
+                                     boolean microtiled,
+                                     boolean macrotiled)
+{
+    struct radeon_pipe_buffer *radeon_buffer =
+        (struct radeon_pipe_buffer*)buffer;
+    uint32_t flags = 0;
+
+    if (microtiled) {
+        flags |= RADEON_BO_FLAGS_MICRO_TILE;
+    }
+    if (macrotiled) {
+        flags |= RADEON_BO_FLAGS_MACRO_TILE;
+    }
+
+    radeon_bo_set_tiling(radeon_buffer->bo, flags, pitch);
+}
+
 static void radeon_fence_reference(struct pipe_winsys *ws,
                                    struct pipe_fence_handle **ptr,
                                    struct pipe_fence_handle *pfence)
@@ -304,5 +324,7 @@ struct radeon_winsys* radeon_pipe_winsys(int fd)
 
     radeon_ws->base.get_name = radeon_get_name;
 
+    radeon_ws->buffer_set_tiling = radeon_buffer_set_tiling;
+
     return radeon_ws;
 }
index 9edc9e038c3c7893ab26366bccbaa914f9e36e2b..864082b99b3894560d9364158092fe027d78ad71 100644 (file)
@@ -100,6 +100,12 @@ struct radeon_winsys {
                         void (*flush_cb)(void *), void *data);
 
     void (*reset_bos)(struct radeon_winsys *winsys);
+
+    void (*buffer_set_tiling)(struct radeon_winsys* winsys,
+                              struct pipe_buffer* buffer,
+                              uint32_t pitch,
+                              boolean microtiled,
+                              boolean macrotiled);
 };
 
 #endif