update jtag table, add colour to images

diff --git a/HDL_workflow/2020-11-03_14-08.png b/HDL_workflow/2020-11-03_14-08.png
index 17014a557267bc9e512591dd34c9ef54253436cf..d7af363b14ab747787da0e0bbc8b437eb139a451 100644 (file)
Binary files a/HDL_workflow/2020-11-03_14-08.png and b/HDL_workflow/2020-11-03_14-08.png differ

diff --git a/HDL_workflow/2020-11-03_14-09.png b/HDL_workflow/2020-11-03_14-09.png
index 2797a40db4340d5a88bc48afd91a1cdcd5838fba..18ed86498131ce6d252d855ab637ed8b4d7d8bbc 100644 (file)
Binary files a/HDL_workflow/2020-11-03_14-09.png and b/HDL_workflow/2020-11-03_14-09.png differ

diff --git a/HDL_workflow/ECP5_FPGA.mdwn b/HDL_workflow/ECP5_FPGA.mdwn
index 65d43012218b3c545c69bde95fa73a766511d922..ed72242ad91f0f76207944b04f2ee37c6fcf3b5f 100644 (file)
--- a/HDL_workflow/ECP5_FPGA.mdwn
+++ b/HDL_workflow/ECP5_FPGA.mdwn
@@ -175,8 +175,8 @@ Table of connections:
 
 | X3  pin #   | FPGA IO PAD | STLinkv2       |Wire Colour|
 |-------------|-------------|----------------|-----------|
-|1 GND        | GND         | GND            |   Black   |
-|2 NC         |NOT CONNECTED| NOT CONNECTED  |    NC     |
+|1 GND        | GND         | 4 (GND)        |   Black   |
+|2 NC         | NC          |  NC            |    NC     |
 |3 +2V5       | 2.5V supply | 2 (MCU VDD)    |   Red     |
 |4 IO29       |  B19        |    5 (TDI)     |   Green   |
 |5 IO30       |  B12        |    7 (TMS)     |   Blue    |