(no commit message)

diff --git a/openpower/sv/ldst.mdwn b/openpower/sv/ldst.mdwn
index 9e61226869e65c7485a8e2ec2eca7009ee8bfd8c..98a194239600f660bb57d1fbac8a1dafaf502715 100644 (file)
--- a/openpower/sv/ldst.mdwn
+++ b/openpower/sv/ldst.mdwn
@@ -60,8 +60,7 @@ a number of different modes:
 or make sense in any Scalar ISA. They **only** exist in Vector ISAs
 and are a critical part of its value*.
 
-Also included in SVP64 LD/ST is both signed and unsigned Saturation,
-as well as Element-width overrides and Twin-Predication.
+Also included in SVP64 LD/ST is Element-width overrides and Twin-Predication.
 
 Note also that Indexed [[sv/remap]] mode may be applied to both Scalar
 LD/ST Immediate Defined Words *and* LD/ST Indexed Defined Words.
@@ -74,7 +73,8 @@ A minor complication (caused by the retro-fitting of modern Vector
 features to a Scalar ISA) is that certain features do not exactly make
 sense or are considered a security risk.  Fault-first on Vector Indexed
 would allow attackers to probe large numbers of pages from userspace,
-where strided Fault-first (by creating contiguous sequential LDs) does not.
+where strided Fault-first (by creating contiguous sequential LDs likely
+to be in the same Page) does not.
 
 In addition, reduce mode makes no sense.  Realistically we need an
 alternative table definition for [[sv/svp64]] `RM.MODE`.  The following