i386: Allow only registers with VALID_INT_MODE_P modes in movstrict<mode> [PR93997]

*movstrict<mode>_1 insn pattern allows only general registers,
so we have to reject modes not suitable for general regs in
corresponding movstrict<mode> expander.

	PR target/93997
	* config/i386/i386.md (movstrict<mode>): Allow only
	registers with VALID_INT_MODE_P modes.

testsuite/ChangeLog:

	PR target/93997
	* gcc.target/i386/pr93997.c: New test.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0d65434de4d5c68ee51bda430cb34c6094841092..d27b74a1a0a612bc8af84136db0ca476050e1c69 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2020-03-02  Uroš Bizjak  <ubizjak@gmail.com>
+
+       PR target/93997
+       * config/i386/i386.md (movstrict<mode>): Allow only
+       registers with VALID_INT_MODE_P modes.
+
 2020-03-02  Andrew Stubbs  <ams@codesourcery.com>
 
        * config/gcn/gcn-valu.md (dpp_move<mode>): New.

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 6c57500ae8ec91e7bcd29923516b9c9c52a5a497..8e29dffafa6e5f8f5a358e7c1acd1861a0af5372 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -2778,7 +2778,7 @@
 {
   gcc_assert (SUBREG_P (operands[0]));
   if ((TARGET_PARTIAL_REG_STALL && optimize_function_for_speed_p (cfun))
-      || GET_MODE_CLASS (GET_MODE (SUBREG_REG (operands[0]))) != MODE_INT)
+      || !VALID_INT_MODE_P (GET_MODE (SUBREG_REG (operands[0]))))
     FAIL;
 })
 

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index e18c6a9f7a675fd7a65baff4353c9b1cd2c938e3..e43c5540e355403f659d1515edac9417408ce535 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2020-03-02  Uroš Bizjak  <ubizjak@gmail.com>
+
+       PR target/93997
+       * gcc.target/i386/pr93997.c: New test.
+
 2020-03-02  Martin Sebor  <msebor@redhat.com>
 
        PR tree-optimization/92982

diff --git a/gcc/testsuite/gcc.target/i386/pr93997.c b/gcc/testsuite/gcc.target/i386/pr93997.c
new file mode 100644 (file)
index 0000000..350d1ea
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr93997.c
@@ -0,0 +1,4 @@
+/* { dg-do compile { target ia32 } } */
+/* { dg-options "-march=athlon-4" } */
+
+#include "../../c-c++-common/vector-scalar.c"