(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
Do-first:
-m32rx_files="cpux.h decodex.c decodex.h m32rx.c mloopx.in modelx.c readx.c semx.c"
+m32rx_files="cpux.c cpux.h decodex.c decodex.h m32rx.c mloopx.in modelx.c readx.c semx.c"
if ( echo $* | grep keep\-m32rx > /dev/null ) ; then
keep_these_too="${m32rx_files} ${keep_these_too}"
else
config.in
configure
configure.in
+cpu.c
cpu.h
cpuall.h
decode.c
SIM_AC_OPTION_DEFAULT_MODEL(m32r/d)
SIM_AC_OPTION_ENVIRONMENT
+if test ${USE_MAINTAINER_MODE} = yes ; then
+ AC_CHECK_PROG(SCHEME, guile, guile, guile)
+fi
+
SIM_AC_OUTPUT
}
void
-EX_FN_NAME (m32r,fmt_5_addv3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_5_addv) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_5_addv3.f
- EXTRACT_FMT_5_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+#define FLD(f) abuf->fields.fmt_5_addv.f
+ EXTRACT_FMT_5_ADDV_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_5_ADDV3_CODE
+ EXTRACT_FMT_5_ADDV_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_5_addv", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+
+ abuf->length = length;
+ abuf->addr = pc;
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
+ abuf->h_gr_set = 0 | (1 << f_r1);
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32r,fmt_6_addv3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_6_addv3.f
+ EXTRACT_FMT_6_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+
+ EXTRACT_FMT_6_ADDV3_CODE
/* Record the fields for the semantic handler. */
FLD (f_r1) = & CPU (h_gr)[f_r1];
FLD (f_r2) = & CPU (h_gr)[f_r2];
FLD (f_simm16) = f_simm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_5_addv3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "simm16 0x%x", 'x', f_simm16, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_6_addv3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "simm16 0x%x", 'x', f_simm16, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_6_addx) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_7_addx) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_6_addx.f
- EXTRACT_FMT_6_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
+#define FLD(f) abuf->fields.fmt_7_addx.f
+ EXTRACT_FMT_7_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_6_ADDX_CODE
+ EXTRACT_FMT_7_ADDX_CODE
/* Record the fields for the semantic handler. */
FLD (f_r1) = & CPU (h_gr)[f_r1];
FLD (f_r2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_6_addx", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_7_addx", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_7_bc8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_8_bc8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_7_bc8.f
- EXTRACT_FMT_7_BC8_VARS /* f-op1 f-r1 f-disp8 */
+#define FLD(f) abuf->fields.fmt_8_bc8.f
+ EXTRACT_FMT_8_BC8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_7_BC8_CODE
+ EXTRACT_FMT_8_BC8_CODE
/* Record the fields for the semantic handler. */
RECORD_IADDR (FLD (f_disp8), (pc & -4L) + f_disp8);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_7_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_8_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_8_bc24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_9_bc24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_8_bc24.f
- EXTRACT_FMT_8_BC24_VARS /* f-op1 f-r1 f-disp24 */
+#define FLD(f) abuf->fields.fmt_9_bc24.f
+ EXTRACT_FMT_9_BC24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_8_BC24_CODE
+ EXTRACT_FMT_9_BC24_CODE
/* Record the fields for the semantic handler. */
RECORD_IADDR (FLD (f_disp24), pc + f_disp24);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_8_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_9_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_9_beq) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_10_beq) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_9_beq.f
- EXTRACT_FMT_9_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
+#define FLD(f) abuf->fields.fmt_10_beq.f
+ EXTRACT_FMT_10_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
- EXTRACT_FMT_9_BEQ_CODE
+ EXTRACT_FMT_10_BEQ_CODE
/* Record the fields for the semantic handler. */
FLD (f_r1) = & CPU (h_gr)[f_r1];
FLD (f_r2) = & CPU (h_gr)[f_r2];
RECORD_IADDR (FLD (f_disp16), pc + f_disp16);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_9_beq", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_10_beq", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_10_beqz) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_11_beqz) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_10_beqz.f
- EXTRACT_FMT_10_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
+#define FLD(f) abuf->fields.fmt_11_beqz.f
+ EXTRACT_FMT_11_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
- EXTRACT_FMT_10_BEQZ_CODE
+ EXTRACT_FMT_11_BEQZ_CODE
/* Record the fields for the semantic handler. */
FLD (f_r2) = & CPU (h_gr)[f_r2];
RECORD_IADDR (FLD (f_disp16), pc + f_disp16);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_10_beqz", "src2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_11_beqz", "src2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_11_bl8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_12_bl8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_11_bl8.f
- EXTRACT_FMT_11_BL8_VARS /* f-op1 f-r1 f-disp8 */
+#define FLD(f) abuf->fields.fmt_12_bl8.f
+ EXTRACT_FMT_12_BL8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_11_BL8_CODE
+ EXTRACT_FMT_12_BL8_CODE
/* Record the fields for the semantic handler. */
RECORD_IADDR (FLD (f_disp8), (pc & -4L) + f_disp8);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_11_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_12_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_12_bl24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_13_bl24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_12_bl24.f
- EXTRACT_FMT_12_BL24_VARS /* f-op1 f-r1 f-disp24 */
+#define FLD(f) abuf->fields.fmt_13_bl24.f
+ EXTRACT_FMT_13_BL24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_12_BL24_CODE
+ EXTRACT_FMT_13_BL24_CODE
/* Record the fields for the semantic handler. */
RECORD_IADDR (FLD (f_disp24), pc + f_disp24);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_12_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_13_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_13_bra8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_14_bra8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_13_bra8.f
- EXTRACT_FMT_13_BRA8_VARS /* f-op1 f-r1 f-disp8 */
+#define FLD(f) abuf->fields.fmt_14_bra8.f
+ EXTRACT_FMT_14_BRA8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_13_BRA8_CODE
+ EXTRACT_FMT_14_BRA8_CODE
/* Record the fields for the semantic handler. */
RECORD_IADDR (FLD (f_disp8), (pc & -4L) + f_disp8);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_13_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_14_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_14_bra24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_15_bra24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_14_bra24.f
- EXTRACT_FMT_14_BRA24_VARS /* f-op1 f-r1 f-disp24 */
+#define FLD(f) abuf->fields.fmt_15_bra24.f
+ EXTRACT_FMT_15_BRA24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_14_BRA24_CODE
+ EXTRACT_FMT_15_BRA24_CODE
/* Record the fields for the semantic handler. */
RECORD_IADDR (FLD (f_disp24), pc + f_disp24);
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_14_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_15_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_15_cmp) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_16_cmp) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_15_cmp.f
- EXTRACT_FMT_15_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
+#define FLD(f) abuf->fields.fmt_16_cmp.f
+ EXTRACT_FMT_16_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_15_CMP_CODE
+ EXTRACT_FMT_16_CMP_CODE
/* Record the fields for the semantic handler. */
FLD (f_r1) = & CPU (h_gr)[f_r1];
FLD (f_r2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_15_cmp", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_16_cmp", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_16_cmpi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_17_cmpi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_16_cmpi.f
- EXTRACT_FMT_16_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+#define FLD(f) abuf->fields.fmt_17_cmpi.f
+ EXTRACT_FMT_17_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_16_CMPI_CODE
+ EXTRACT_FMT_17_CMPI_CODE
/* Record the fields for the semantic handler. */
FLD (f_r2) = & CPU (h_gr)[f_r2];
FLD (f_simm16) = f_simm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_16_cmpi", "src2 0x%x", 'x', f_r2, "simm16 0x%x", 'x', f_simm16, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_17_cmpi", "src2 0x%x", 'x', f_r2, "simm16 0x%x", 'x', f_simm16, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_17_cmpui) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_18_cmpui) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_17_cmpui.f
- EXTRACT_FMT_17_CMPUI_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
+#define FLD(f) abuf->fields.fmt_18_cmpui.f
+ EXTRACT_FMT_18_CMPUI_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_17_CMPUI_CODE
+ EXTRACT_FMT_18_CMPUI_CODE
/* Record the fields for the semantic handler. */
FLD (f_r2) = & CPU (h_gr)[f_r2];
FLD (f_uimm16) = f_uimm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_17_cmpui", "src2 0x%x", 'x', f_r2, "uimm16 0x%x", 'x', f_uimm16, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_18_cmpui", "src2 0x%x", 'x', f_r2, "uimm16 0x%x", 'x', f_uimm16, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_18_div) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_19_div) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_18_div.f
- EXTRACT_FMT_18_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+#define FLD(f) abuf->fields.fmt_19_div.f
+ EXTRACT_FMT_19_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_18_DIV_CODE
+ EXTRACT_FMT_19_DIV_CODE
/* Record the fields for the semantic handler. */
FLD (f_r1) = & CPU (h_gr)[f_r1];
FLD (f_r2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_18_div", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_19_div", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_19_jl) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_20_jl) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_19_jl.f
- EXTRACT_FMT_19_JL_VARS /* f-op1 f-r1 f-op2 f-r2 */
+#define FLD(f) abuf->fields.fmt_20_jl.f
+ EXTRACT_FMT_20_JL_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_19_JL_CODE
+ EXTRACT_FMT_20_JL_CODE
/* Record the fields for the semantic handler. */
FLD (f_r2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_19_jl", "sr 0x%x", 'x', f_r2, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_20_jl", "sr 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_20_jmp) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_21_jmp) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_20_jmp.f
- EXTRACT_FMT_20_JMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
+#define FLD(f) abuf->fields.fmt_21_jmp.f
+ EXTRACT_FMT_21_JMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_20_JMP_CODE
+ EXTRACT_FMT_21_JMP_CODE
/* Record the fields for the semantic handler. */
FLD (f_r2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_20_jmp", "sr 0x%x", 'x', f_r2, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_21_jmp", "sr 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_21_ld) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_22_ld) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_21_ld.f
- EXTRACT_FMT_21_LD_VARS /* f-op1 f-r1 f-op2 f-r2 */
+#define FLD(f) abuf->fields.fmt_22_ld.f
+ EXTRACT_FMT_22_LD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_21_LD_CODE
+ EXTRACT_FMT_22_LD_CODE
/* Record the fields for the semantic handler. */
FLD (f_r1) = & CPU (h_gr)[f_r1];
FLD (f_r2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_21_ld", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_22_ld", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_22_ld_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_23_ld_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_22_ld_d.f
- EXTRACT_FMT_22_LD_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+#define FLD(f) abuf->fields.fmt_23_ld_d.f
+ EXTRACT_FMT_23_LD_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_22_LD_D_CODE
+ EXTRACT_FMT_23_LD_D_CODE
/* Record the fields for the semantic handler. */
FLD (f_r1) = & CPU (h_gr)[f_r1];
FLD (f_r2) = & CPU (h_gr)[f_r2];
FLD (f_simm16) = f_simm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_22_ld_d", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_23_ld_d", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_23_ldb) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_24_ldb) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_23_ldb.f
- EXTRACT_FMT_23_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
+#define FLD(f) abuf->fields.fmt_24_ldb.f
+ EXTRACT_FMT_24_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_23_LDB_CODE
+ EXTRACT_FMT_24_LDB_CODE
/* Record the fields for the semantic handler. */
FLD (f_r1) = & CPU (h_gr)[f_r1];
FLD (f_r2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_23_ldb", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_24_ldb", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_24_ldb_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_25_ldb_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_24_ldb_d.f
- EXTRACT_FMT_24_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+#define FLD(f) abuf->fields.fmt_25_ldb_d.f
+ EXTRACT_FMT_25_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_24_LDB_D_CODE
+ EXTRACT_FMT_25_LDB_D_CODE
/* Record the fields for the semantic handler. */
FLD (f_r1) = & CPU (h_gr)[f_r1];
FLD (f_r2) = & CPU (h_gr)[f_r2];
FLD (f_simm16) = f_simm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_24_ldb_d", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_25_ldb_d", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_25_ldh) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_26_ldh) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_25_ldh.f
- EXTRACT_FMT_25_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
+#define FLD(f) abuf->fields.fmt_26_ldh.f
+ EXTRACT_FMT_26_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_25_LDH_CODE
+ EXTRACT_FMT_26_LDH_CODE
/* Record the fields for the semantic handler. */
FLD (f_r1) = & CPU (h_gr)[f_r1];
FLD (f_r2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_25_ldh", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_26_ldh", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_26_ldh_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_27_ldh_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_26_ldh_d.f
- EXTRACT_FMT_26_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+#define FLD(f) abuf->fields.fmt_27_ldh_d.f
+ EXTRACT_FMT_27_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_26_LDH_D_CODE
+ EXTRACT_FMT_27_LDH_D_CODE
/* Record the fields for the semantic handler. */
FLD (f_r1) = & CPU (h_gr)[f_r1];
FLD (f_r2) = & CPU (h_gr)[f_r2];
FLD (f_simm16) = f_simm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_26_ldh_d", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_27_ldh_d", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_27_ld24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_28_ld_plus) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_27_ld24.f
- EXTRACT_FMT_27_LD24_VARS /* f-op1 f-r1 f-uimm24 */
+#define FLD(f) abuf->fields.fmt_28_ld_plus.f
+ EXTRACT_FMT_28_LD_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_27_LD24_CODE
+ EXTRACT_FMT_28_LD_PLUS_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_28_ld_plus", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+
+ abuf->length = length;
+ abuf->addr = pc;
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ abuf->h_gr_get = 0 | (1 << f_r2);
+ abuf->h_gr_set = 0 | (1 << f_r1) | (1 << f_r2);
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32r,fmt_29_ld24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_29_ld24.f
+ EXTRACT_FMT_29_LD24_VARS /* f-op1 f-r1 f-uimm24 */
+
+ EXTRACT_FMT_29_LD24_CODE
/* Record the fields for the semantic handler. */
FLD (f_r1) = & CPU (h_gr)[f_r1];
FLD (f_uimm24) = f_uimm24;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_27_ld24", "dr 0x%x", 'x', f_r1, "uimm24 0x%x", 'x', f_uimm24, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_29_ld24", "dr 0x%x", 'x', f_r1, "uimm24 0x%x", 'x', f_uimm24, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_28_ldi8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_30_ldi8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_28_ldi8.f
- EXTRACT_FMT_28_LDI8_VARS /* f-op1 f-r1 f-simm8 */
+#define FLD(f) abuf->fields.fmt_30_ldi8.f
+ EXTRACT_FMT_30_LDI8_VARS /* f-op1 f-r1 f-simm8 */
- EXTRACT_FMT_28_LDI8_CODE
+ EXTRACT_FMT_30_LDI8_CODE
/* Record the fields for the semantic handler. */
FLD (f_r1) = & CPU (h_gr)[f_r1];
FLD (f_simm8) = f_simm8;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_28_ldi8", "dr 0x%x", 'x', f_r1, "simm8 0x%x", 'x', f_simm8, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_30_ldi8", "dr 0x%x", 'x', f_r1, "simm8 0x%x", 'x', f_simm8, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_29_ldi16) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_31_ldi16) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_29_ldi16.f
- EXTRACT_FMT_29_LDI16_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+#define FLD(f) abuf->fields.fmt_31_ldi16.f
+ EXTRACT_FMT_31_LDI16_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_29_LDI16_CODE
+ EXTRACT_FMT_31_LDI16_CODE
/* Record the fields for the semantic handler. */
FLD (f_r1) = & CPU (h_gr)[f_r1];
FLD (f_simm16) = f_simm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_29_ldi16", "dr 0x%x", 'x', f_r1, "slo16 0x%x", 'x', f_simm16, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_31_ldi16", "dr 0x%x", 'x', f_r1, "slo16 0x%x", 'x', f_simm16, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_30_machi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_32_lock) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_32_lock.f
+ EXTRACT_FMT_32_LOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_32_LOCK_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_32_lock", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+
+ abuf->length = length;
+ abuf->addr = pc;
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32r,fmt_33_machi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_30_machi.f
- EXTRACT_FMT_30_MACHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
+#define FLD(f) abuf->fields.fmt_33_machi.f
+ EXTRACT_FMT_33_MACHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_30_MACHI_CODE
+ EXTRACT_FMT_33_MACHI_CODE
/* Record the fields for the semantic handler. */
FLD (f_r1) = & CPU (h_gr)[f_r1];
FLD (f_r2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_30_machi", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_33_machi", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_31_mv) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_34_mulhi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_31_mv.f
- EXTRACT_FMT_31_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
+#define FLD(f) abuf->fields.fmt_34_mulhi.f
+ EXTRACT_FMT_34_MULHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_31_MV_CODE
+ EXTRACT_FMT_34_MULHI_CODE
/* Record the fields for the semantic handler. */
FLD (f_r1) = & CPU (h_gr)[f_r1];
FLD (f_r2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_31_mv", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_34_mulhi", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
+
+ abuf->length = length;
+ abuf->addr = pc;
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32r,fmt_35_mv) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_35_mv.f
+ EXTRACT_FMT_35_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_35_MV_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_35_mv", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_32_mvfachi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_36_mvfachi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_32_mvfachi.f
- EXTRACT_FMT_32_MVFACHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
+#define FLD(f) abuf->fields.fmt_36_mvfachi.f
+ EXTRACT_FMT_36_MVFACHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_32_MVFACHI_CODE
+ EXTRACT_FMT_36_MVFACHI_CODE
/* Record the fields for the semantic handler. */
FLD (f_r1) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_32_mvfachi", "dr 0x%x", 'x', f_r1, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_36_mvfachi", "dr 0x%x", 'x', f_r1, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_33_mvfc) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_37_mvfc) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_33_mvfc.f
- EXTRACT_FMT_33_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+#define FLD(f) abuf->fields.fmt_37_mvfc.f
+ EXTRACT_FMT_37_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_33_MVFC_CODE
+ EXTRACT_FMT_37_MVFC_CODE
/* Record the fields for the semantic handler. */
FLD (f_r1) = & CPU (h_gr)[f_r1];
FLD (f_r2) = f_r2;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_33_mvfc", "dr 0x%x", 'x', f_r1, "scr 0x%x", 'x', f_r2, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_37_mvfc", "dr 0x%x", 'x', f_r1, "scr 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_34_mvtachi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_38_mvtachi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_34_mvtachi.f
- EXTRACT_FMT_34_MVTACHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
+#define FLD(f) abuf->fields.fmt_38_mvtachi.f
+ EXTRACT_FMT_38_MVTACHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_34_MVTACHI_CODE
+ EXTRACT_FMT_38_MVTACHI_CODE
/* Record the fields for the semantic handler. */
FLD (f_r1) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_34_mvtachi", "src1 0x%x", 'x', f_r1, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_38_mvtachi", "src1 0x%x", 'x', f_r1, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_35_mvtc) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_39_mvtc) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_35_mvtc.f
- EXTRACT_FMT_35_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+#define FLD(f) abuf->fields.fmt_39_mvtc.f
+ EXTRACT_FMT_39_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_35_MVTC_CODE
+ EXTRACT_FMT_39_MVTC_CODE
/* Record the fields for the semantic handler. */
FLD (f_r1) = f_r1;
FLD (f_r2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_35_mvtc", "dcr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_39_mvtc", "dcr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_36_nop) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_40_nop) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_36_nop.f
- EXTRACT_FMT_36_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
+#define FLD(f) abuf->fields.fmt_40_nop.f
+ EXTRACT_FMT_40_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_36_NOP_CODE
+ EXTRACT_FMT_40_NOP_CODE
/* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_36_nop", (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_40_nop", (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_37_rac) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_41_rac) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_37_rac.f
- EXTRACT_FMT_37_RAC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+#define FLD(f) abuf->fields.fmt_41_rac.f
+ EXTRACT_FMT_41_RAC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_37_RAC_CODE
+ EXTRACT_FMT_41_RAC_CODE
/* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_37_rac", (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_41_rac", (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_38_rte) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_42_rte) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_38_rte.f
- EXTRACT_FMT_38_RTE_VARS /* f-op1 f-r1 f-op2 f-r2 */
+#define FLD(f) abuf->fields.fmt_42_rte.f
+ EXTRACT_FMT_42_RTE_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_38_RTE_CODE
+ EXTRACT_FMT_42_RTE_CODE
/* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_38_rte", (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_42_rte", (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_39_seth) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_43_seth) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_39_seth.f
- EXTRACT_FMT_39_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */
+#define FLD(f) abuf->fields.fmt_43_seth.f
+ EXTRACT_FMT_43_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */
- EXTRACT_FMT_39_SETH_CODE
+ EXTRACT_FMT_43_SETH_CODE
/* Record the fields for the semantic handler. */
FLD (f_r1) = & CPU (h_gr)[f_r1];
FLD (f_hi16) = f_hi16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_39_seth", "dr 0x%x", 'x', f_r1, "hi16 0x%x", 'x', f_hi16, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_43_seth", "dr 0x%x", 'x', f_r1, "hi16 0x%x", 'x', f_hi16, (char *) 0));
+
+ abuf->length = length;
+ abuf->addr = pc;
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ abuf->h_gr_set = 0 | (1 << f_r1);
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32r,fmt_44_sll3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_44_sll3.f
+ EXTRACT_FMT_44_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+
+ EXTRACT_FMT_44_SLL3_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ FLD (f_simm16) = f_simm16;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_44_sll3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "simm16 0x%x", 'x', f_simm16, (char *) 0));
abuf->length = length;
abuf->addr = pc;
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
+ abuf->h_gr_get = 0 | (1 << f_r2);
abuf->h_gr_set = 0 | (1 << f_r1);
}
#endif
}
void
-EX_FN_NAME (m32r,fmt_40_slli) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_45_slli) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_40_slli.f
- EXTRACT_FMT_40_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
+#define FLD(f) abuf->fields.fmt_45_slli.f
+ EXTRACT_FMT_45_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
- EXTRACT_FMT_40_SLLI_CODE
+ EXTRACT_FMT_45_SLLI_CODE
/* Record the fields for the semantic handler. */
FLD (f_r1) = & CPU (h_gr)[f_r1];
FLD (f_uimm5) = f_uimm5;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_40_slli", "dr 0x%x", 'x', f_r1, "uimm5 0x%x", 'x', f_uimm5, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_45_slli", "dr 0x%x", 'x', f_r1, "uimm5 0x%x", 'x', f_uimm5, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_41_st_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_46_st) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_46_st.f
+ EXTRACT_FMT_46_ST_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_46_ST_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_46_st", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
+
+ abuf->length = length;
+ abuf->addr = pc;
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32r,fmt_47_st_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_41_st_d.f
- EXTRACT_FMT_41_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+#define FLD(f) abuf->fields.fmt_47_st_d.f
+ EXTRACT_FMT_47_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_41_ST_D_CODE
+ EXTRACT_FMT_47_ST_D_CODE
/* Record the fields for the semantic handler. */
FLD (f_r1) = & CPU (h_gr)[f_r1];
FLD (f_r2) = & CPU (h_gr)[f_r2];
FLD (f_simm16) = f_simm16;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_41_st_d", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_47_st_d", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
abuf->length = length;
abuf->addr = pc;
}
void
-EX_FN_NAME (m32r,fmt_42_trap) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32r,fmt_48_stb) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_42_trap.f
- EXTRACT_FMT_42_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */
+#define FLD(f) abuf->fields.fmt_48_stb.f
+ EXTRACT_FMT_48_STB_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_42_TRAP_CODE
+ EXTRACT_FMT_48_STB_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_48_stb", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
+
+ abuf->length = length;
+ abuf->addr = pc;
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32r,fmt_49_stb_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_49_stb_d.f
+ EXTRACT_FMT_49_STB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+
+ EXTRACT_FMT_49_STB_D_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ FLD (f_simm16) = f_simm16;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_49_stb_d", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
+
+ abuf->length = length;
+ abuf->addr = pc;
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32r,fmt_50_sth) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_50_sth.f
+ EXTRACT_FMT_50_STH_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_50_STH_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_50_sth", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
+
+ abuf->length = length;
+ abuf->addr = pc;
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32r,fmt_51_sth_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_51_sth_d.f
+ EXTRACT_FMT_51_STH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+
+ EXTRACT_FMT_51_STH_D_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ FLD (f_simm16) = f_simm16;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_51_sth_d", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
+
+ abuf->length = length;
+ abuf->addr = pc;
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32r,fmt_52_st_plus) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_52_st_plus.f
+ EXTRACT_FMT_52_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_52_ST_PLUS_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_52_st_plus", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
+
+ abuf->length = length;
+ abuf->addr = pc;
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
+ abuf->h_gr_set = 0 | (1 << f_r2);
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32r,fmt_53_trap) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_53_trap.f
+ EXTRACT_FMT_53_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */
+
+ EXTRACT_FMT_53_TRAP_CODE
/* Record the fields for the semantic handler. */
FLD (f_uimm4) = f_uimm4;
- TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_42_trap", "uimm4 0x%x", 'x', f_uimm4, (char *) 0));
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_53_trap", "uimm4 0x%x", 'x', f_uimm4, (char *) 0));
+
+ abuf->length = length;
+ abuf->addr = pc;
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32r,fmt_54_unlock) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_54_unlock.f
+ EXTRACT_FMT_54_UNLOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_54_UNLOCK_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_54_unlock", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
abuf->length = length;
abuf->addr = pc;
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
+ }
+#endif
#undef FLD
}
&& case_read_READ_FMT_0_ADD,
&& case_read_READ_FMT_2_AND3,
&& case_read_READ_FMT_4_ADDI,
+ && case_read_READ_FMT_5_ADDV,
+ && case_read_READ_FMT_6_ADDV3,
+ && case_read_READ_FMT_7_ADDX,
+ && case_read_READ_FMT_8_BC8,
+ && case_read_READ_FMT_9_BC24,
+ && case_read_READ_FMT_10_BEQ,
+ && case_read_READ_FMT_11_BEQZ,
+ && case_read_READ_FMT_11_BEQZ,
+ && case_read_READ_FMT_11_BEQZ,
+ && case_read_READ_FMT_11_BEQZ,
+ && case_read_READ_FMT_11_BEQZ,
+ && case_read_READ_FMT_11_BEQZ,
+ && case_read_READ_FMT_12_BL8,
+ && case_read_READ_FMT_13_BL24,
+ && case_read_READ_FMT_14_BCL8,
+ && case_read_READ_FMT_15_BCL24,
+ && case_read_READ_FMT_8_BC8,
+ && case_read_READ_FMT_9_BC24,
+ && case_read_READ_FMT_10_BEQ,
+ && case_read_READ_FMT_16_BRA8,
+ && case_read_READ_FMT_17_BRA24,
+ && case_read_READ_FMT_14_BCL8,
+ && case_read_READ_FMT_15_BCL24,
+ && case_read_READ_FMT_18_CMP,
+ && case_read_READ_FMT_19_CMPI,
+ && case_read_READ_FMT_18_CMP,
+ && case_read_READ_FMT_20_CMPUI,
+ && case_read_READ_FMT_18_CMP,
+ && case_read_READ_FMT_21_CMPZ,
+ && case_read_READ_FMT_22_DIV,
+ && case_read_READ_FMT_22_DIV,
+ && case_read_READ_FMT_22_DIV,
+ && case_read_READ_FMT_22_DIV,
+ && case_read_READ_FMT_22_DIV,
+ && case_read_READ_FMT_23_JC,
+ && case_read_READ_FMT_23_JC,
+ && case_read_READ_FMT_24_JL,
+ && case_read_READ_FMT_25_JMP,
+ && case_read_READ_FMT_26_LD,
+ && case_read_READ_FMT_27_LD_D,
+ && case_read_READ_FMT_28_LDB,
+ && case_read_READ_FMT_29_LDB_D,
+ && case_read_READ_FMT_30_LDH,
+ && case_read_READ_FMT_31_LDH_D,
+ && case_read_READ_FMT_28_LDB,
+ && case_read_READ_FMT_29_LDB_D,
+ && case_read_READ_FMT_30_LDH,
+ && case_read_READ_FMT_31_LDH_D,
+ && case_read_READ_FMT_32_LD_PLUS,
+ && case_read_READ_FMT_33_LD24,
+ && case_read_READ_FMT_34_LDI8,
+ && case_read_READ_FMT_35_LDI16,
+ && case_read_READ_FMT_36_LOCK,
+ && case_read_READ_FMT_37_MACHI_A,
+ && case_read_READ_FMT_37_MACHI_A,
&& case_read_READ_FMT_0_ADD,
- && case_read_READ_FMT_5_ADDV3,
- && case_read_READ_FMT_6_ADDX,
- && case_read_READ_FMT_7_BC8,
- && case_read_READ_FMT_8_BC24,
- && case_read_READ_FMT_9_BEQ,
- && case_read_READ_FMT_10_BEQZ,
- && case_read_READ_FMT_10_BEQZ,
- && case_read_READ_FMT_10_BEQZ,
- && case_read_READ_FMT_10_BEQZ,
- && case_read_READ_FMT_10_BEQZ,
- && case_read_READ_FMT_10_BEQZ,
- && case_read_READ_FMT_11_BL8,
- && case_read_READ_FMT_12_BL24,
- && case_read_READ_FMT_13_BCL8,
- && case_read_READ_FMT_14_BCL24,
- && case_read_READ_FMT_7_BC8,
- && case_read_READ_FMT_8_BC24,
- && case_read_READ_FMT_9_BEQ,
- && case_read_READ_FMT_15_BRA8,
- && case_read_READ_FMT_16_BRA24,
- && case_read_READ_FMT_13_BCL8,
- && case_read_READ_FMT_14_BCL24,
- && case_read_READ_FMT_17_CMP,
- && case_read_READ_FMT_18_CMPI,
- && case_read_READ_FMT_17_CMP,
- && case_read_READ_FMT_19_CMPUI,
- && case_read_READ_FMT_17_CMP,
- && case_read_READ_FMT_20_CMPZ,
- && case_read_READ_FMT_21_DIV,
- && case_read_READ_FMT_21_DIV,
- && case_read_READ_FMT_21_DIV,
- && case_read_READ_FMT_21_DIV,
- && case_read_READ_FMT_21_DIV,
- && case_read_READ_FMT_22_JC,
- && case_read_READ_FMT_22_JC,
- && case_read_READ_FMT_23_JL,
- && case_read_READ_FMT_24_JMP,
- && case_read_READ_FMT_25_LD,
- && case_read_READ_FMT_26_LD_D,
- && case_read_READ_FMT_27_LDB,
- && case_read_READ_FMT_28_LDB_D,
- && case_read_READ_FMT_29_LDH,
- && case_read_READ_FMT_30_LDH_D,
- && case_read_READ_FMT_27_LDB,
- && case_read_READ_FMT_28_LDB_D,
- && case_read_READ_FMT_29_LDH,
- && case_read_READ_FMT_30_LDH_D,
- && case_read_READ_FMT_25_LD,
- && case_read_READ_FMT_31_LD24,
- && case_read_READ_FMT_32_LDI8,
- && case_read_READ_FMT_33_LDI16,
+ && case_read_READ_FMT_38_MULHI_A,
+ && case_read_READ_FMT_38_MULHI_A,
+ && case_read_READ_FMT_39_MV,
+ && case_read_READ_FMT_40_MVFACHI_A,
+ && case_read_READ_FMT_40_MVFACHI_A,
+ && case_read_READ_FMT_40_MVFACHI_A,
+ && case_read_READ_FMT_41_MVFC,
+ && case_read_READ_FMT_42_MVTACHI_A,
+ && case_read_READ_FMT_42_MVTACHI_A,
+ && case_read_READ_FMT_43_MVTC,
+ && case_read_READ_FMT_39_MV,
+ && case_read_READ_FMT_44_NOP,
+ && case_read_READ_FMT_39_MV,
+ && case_read_READ_FMT_45_RAC_D,
+ && case_read_READ_FMT_46_RAC_DS,
+ && case_read_READ_FMT_47_RAC_DSI,
+ && case_read_READ_FMT_45_RAC_D,
+ && case_read_READ_FMT_46_RAC_DS,
+ && case_read_READ_FMT_47_RAC_DSI,
+ && case_read_READ_FMT_48_RTE,
+ && case_read_READ_FMT_49_SETH,
&& case_read_READ_FMT_0_ADD,
- && case_read_READ_FMT_34_MACHI_A,
- && case_read_READ_FMT_34_MACHI_A,
+ && case_read_READ_FMT_50_SLL3,
+ && case_read_READ_FMT_51_SLLI,
&& case_read_READ_FMT_0_ADD,
- && case_read_READ_FMT_35_MULHI_A,
- && case_read_READ_FMT_35_MULHI_A,
- && case_read_READ_FMT_36_MV,
- && case_read_READ_FMT_37_MVFACHI_A,
- && case_read_READ_FMT_37_MVFACHI_A,
- && case_read_READ_FMT_37_MVFACHI_A,
- && case_read_READ_FMT_38_MVFC,
- && case_read_READ_FMT_39_MVTACHI_A,
- && case_read_READ_FMT_39_MVTACHI_A,
- && case_read_READ_FMT_40_MVTC,
- && case_read_READ_FMT_36_MV,
- && case_read_READ_FMT_41_NOP,
- && case_read_READ_FMT_36_MV,
- && case_read_READ_FMT_42_RAC_D,
- && case_read_READ_FMT_43_RAC_DS,
- && case_read_READ_FMT_44_RAC_DSI,
- && case_read_READ_FMT_42_RAC_D,
- && case_read_READ_FMT_43_RAC_DS,
- && case_read_READ_FMT_44_RAC_DSI,
- && case_read_READ_FMT_45_RTE,
- && case_read_READ_FMT_46_SETH,
+ && case_read_READ_FMT_50_SLL3,
+ && case_read_READ_FMT_51_SLLI,
&& case_read_READ_FMT_0_ADD,
- && case_read_READ_FMT_5_ADDV3,
- && case_read_READ_FMT_47_SLLI,
+ && case_read_READ_FMT_50_SLL3,
+ && case_read_READ_FMT_51_SLLI,
+ && case_read_READ_FMT_52_ST,
+ && case_read_READ_FMT_53_ST_D,
+ && case_read_READ_FMT_54_STB,
+ && case_read_READ_FMT_55_STB_D,
+ && case_read_READ_FMT_56_STH,
+ && case_read_READ_FMT_57_STH_D,
+ && case_read_READ_FMT_58_ST_PLUS,
+ && case_read_READ_FMT_58_ST_PLUS,
&& case_read_READ_FMT_0_ADD,
- && case_read_READ_FMT_5_ADDV3,
- && case_read_READ_FMT_47_SLLI,
- && case_read_READ_FMT_0_ADD,
- && case_read_READ_FMT_5_ADDV3,
- && case_read_READ_FMT_47_SLLI,
- && case_read_READ_FMT_17_CMP,
- && case_read_READ_FMT_48_ST_D,
- && case_read_READ_FMT_17_CMP,
- && case_read_READ_FMT_48_ST_D,
- && case_read_READ_FMT_17_CMP,
- && case_read_READ_FMT_48_ST_D,
- && case_read_READ_FMT_17_CMP,
- && case_read_READ_FMT_17_CMP,
- && case_read_READ_FMT_0_ADD,
- && case_read_READ_FMT_0_ADD,
- && case_read_READ_FMT_6_ADDX,
- && case_read_READ_FMT_49_TRAP,
- && case_read_READ_FMT_17_CMP,
- && case_read_READ_FMT_50_SATB,
- && case_read_READ_FMT_50_SATB,
- && case_read_READ_FMT_51_SAT,
- && case_read_READ_FMT_20_CMPZ,
- && case_read_READ_FMT_52_SADD,
- && case_read_READ_FMT_53_MACWU1,
- && case_read_READ_FMT_54_MSBLO,
- && case_read_READ_FMT_17_CMP,
- && case_read_READ_FMT_53_MACWU1,
- && case_read_READ_FMT_55_SC,
- && case_read_READ_FMT_55_SC,
+ && case_read_READ_FMT_5_ADDV,
+ && case_read_READ_FMT_7_ADDX,
+ && case_read_READ_FMT_59_TRAP,
+ && case_read_READ_FMT_60_UNLOCK,
+ && case_read_READ_FMT_61_SATB,
+ && case_read_READ_FMT_61_SATB,
+ && case_read_READ_FMT_62_SAT,
+ && case_read_READ_FMT_21_CMPZ,
+ && case_read_READ_FMT_63_SADD,
+ && case_read_READ_FMT_64_MACWU1,
+ && case_read_READ_FMT_65_MSBLO,
+ && case_read_READ_FMT_66_MULWU1,
+ && case_read_READ_FMT_64_MACWU1,
+ && case_read_READ_FMT_67_SC,
+ && case_read_READ_FMT_67_SC,
0
};
extern DECODE *m32rx_decode_vars[];
}
BREAK (read);
- CASE (read, READ_FMT_5_ADDV3) : /* e.g. addv3 $dr,$sr,#$simm16 */
+ CASE (read, READ_FMT_5_ADDV) : /* e.g. addv $dr,$sr */
{
-#define OPRND(f) par_exec->operands.fmt_5_addv3.f
- EXTRACT_FMT_5_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_5_ADDV3_CODE
+#define OPRND(f) par_exec->operands.fmt_5_addv.f
+ EXTRACT_FMT_5_ADDV_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_5_ADDV_CODE
+
+ /* Fetch the input operands for the semantic handler. */
+ OPRND (dr) = CPU (h_gr[f_r1]);
+ OPRND (sr) = CPU (h_gr[f_r2]);
+#undef OPRND
+ }
+ BREAK (read);
+
+ CASE (read, READ_FMT_6_ADDV3) : /* e.g. addv3 $dr,$sr,#$simm16 */
+ {
+#define OPRND(f) par_exec->operands.fmt_6_addv3.f
+ EXTRACT_FMT_6_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_6_ADDV3_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (simm16) = f_simm16;
}
BREAK (read);
- CASE (read, READ_FMT_6_ADDX) : /* e.g. addx $dr,$sr */
+ CASE (read, READ_FMT_7_ADDX) : /* e.g. addx $dr,$sr */
{
-#define OPRND(f) par_exec->operands.fmt_6_addx.f
- EXTRACT_FMT_6_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_6_ADDX_CODE
+#define OPRND(f) par_exec->operands.fmt_7_addx.f
+ EXTRACT_FMT_7_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_7_ADDX_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (condbit) = CPU (h_cond);
}
BREAK (read);
- CASE (read, READ_FMT_7_BC8) : /* e.g. bc $disp8 */
+ CASE (read, READ_FMT_8_BC8) : /* e.g. bc $disp8 */
{
-#define OPRND(f) par_exec->operands.fmt_7_bc8.f
- EXTRACT_FMT_7_BC8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_7_BC8_CODE
+#define OPRND(f) par_exec->operands.fmt_8_bc8.f
+ EXTRACT_FMT_8_BC8_VARS /* f-op1 f-r1 f-disp8 */
+ EXTRACT_FMT_8_BC8_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (condbit) = CPU (h_cond);
- OPRND (disp8) = f_disp8;
+ RECORD_IADDR (OPRND (disp8), (pc & -4L) + f_disp8);
#undef OPRND
}
BREAK (read);
- CASE (read, READ_FMT_8_BC24) : /* e.g. bc $disp24 */
+ CASE (read, READ_FMT_9_BC24) : /* e.g. bc $disp24 */
{
-#define OPRND(f) par_exec->operands.fmt_8_bc24.f
- EXTRACT_FMT_8_BC24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_8_BC24_CODE
+#define OPRND(f) par_exec->operands.fmt_9_bc24.f
+ EXTRACT_FMT_9_BC24_VARS /* f-op1 f-r1 f-disp24 */
+ EXTRACT_FMT_9_BC24_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (condbit) = CPU (h_cond);
- OPRND (disp24) = f_disp24;
+ OPRND (disp24) = pc + f_disp24;
#undef OPRND
}
BREAK (read);
- CASE (read, READ_FMT_9_BEQ) : /* e.g. beq $src1,$src2,$disp16 */
+ CASE (read, READ_FMT_10_BEQ) : /* e.g. beq $src1,$src2,$disp16 */
{
-#define OPRND(f) par_exec->operands.fmt_9_beq.f
- EXTRACT_FMT_9_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
- EXTRACT_FMT_9_BEQ_CODE
+#define OPRND(f) par_exec->operands.fmt_10_beq.f
+ EXTRACT_FMT_10_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
+ EXTRACT_FMT_10_BEQ_CODE
/* Fetch the input operands for the semantic handler. */
- OPRND (disp16) = f_disp16;
+ OPRND (disp16) = pc + f_disp16;
OPRND (src1) = CPU (h_gr[f_r1]);
OPRND (src2) = CPU (h_gr[f_r2]);
#undef OPRND
}
BREAK (read);
- CASE (read, READ_FMT_10_BEQZ) : /* e.g. beqz $src2,$disp16 */
+ CASE (read, READ_FMT_11_BEQZ) : /* e.g. beqz $src2,$disp16 */
{
-#define OPRND(f) par_exec->operands.fmt_10_beqz.f
- EXTRACT_FMT_10_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
- EXTRACT_FMT_10_BEQZ_CODE
+#define OPRND(f) par_exec->operands.fmt_11_beqz.f
+ EXTRACT_FMT_11_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
+ EXTRACT_FMT_11_BEQZ_CODE
/* Fetch the input operands for the semantic handler. */
- OPRND (disp16) = f_disp16;
+ OPRND (disp16) = pc + f_disp16;
OPRND (src2) = CPU (h_gr[f_r2]);
#undef OPRND
}
BREAK (read);
- CASE (read, READ_FMT_11_BL8) : /* e.g. bl $disp8 */
+ CASE (read, READ_FMT_12_BL8) : /* e.g. bl $disp8 */
{
-#define OPRND(f) par_exec->operands.fmt_11_bl8.f
- EXTRACT_FMT_11_BL8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_11_BL8_CODE
+#define OPRND(f) par_exec->operands.fmt_12_bl8.f
+ EXTRACT_FMT_12_BL8_VARS /* f-op1 f-r1 f-disp8 */
+ EXTRACT_FMT_12_BL8_CODE
/* Fetch the input operands for the semantic handler. */
- OPRND (disp8) = f_disp8;
+ RECORD_IADDR (OPRND (disp8), (pc & -4L) + f_disp8);
OPRND (pc) = CPU (h_pc);
#undef OPRND
}
BREAK (read);
- CASE (read, READ_FMT_12_BL24) : /* e.g. bl $disp24 */
+ CASE (read, READ_FMT_13_BL24) : /* e.g. bl $disp24 */
{
-#define OPRND(f) par_exec->operands.fmt_12_bl24.f
- EXTRACT_FMT_12_BL24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_12_BL24_CODE
+#define OPRND(f) par_exec->operands.fmt_13_bl24.f
+ EXTRACT_FMT_13_BL24_VARS /* f-op1 f-r1 f-disp24 */
+ EXTRACT_FMT_13_BL24_CODE
/* Fetch the input operands for the semantic handler. */
- OPRND (disp24) = f_disp24;
+ OPRND (disp24) = pc + f_disp24;
OPRND (pc) = CPU (h_pc);
#undef OPRND
}
BREAK (read);
- CASE (read, READ_FMT_13_BCL8) : /* e.g. bcl $disp8 */
+ CASE (read, READ_FMT_14_BCL8) : /* e.g. bcl $disp8 */
{
-#define OPRND(f) par_exec->operands.fmt_13_bcl8.f
- EXTRACT_FMT_13_BCL8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_13_BCL8_CODE
+#define OPRND(f) par_exec->operands.fmt_14_bcl8.f
+ EXTRACT_FMT_14_BCL8_VARS /* f-op1 f-r1 f-disp8 */
+ EXTRACT_FMT_14_BCL8_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (condbit) = CPU (h_cond);
- OPRND (disp8) = f_disp8;
+ RECORD_IADDR (OPRND (disp8), (pc & -4L) + f_disp8);
OPRND (pc) = CPU (h_pc);
#undef OPRND
}
BREAK (read);
- CASE (read, READ_FMT_14_BCL24) : /* e.g. bcl $disp24 */
+ CASE (read, READ_FMT_15_BCL24) : /* e.g. bcl $disp24 */
{
-#define OPRND(f) par_exec->operands.fmt_14_bcl24.f
- EXTRACT_FMT_14_BCL24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_14_BCL24_CODE
+#define OPRND(f) par_exec->operands.fmt_15_bcl24.f
+ EXTRACT_FMT_15_BCL24_VARS /* f-op1 f-r1 f-disp24 */
+ EXTRACT_FMT_15_BCL24_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (condbit) = CPU (h_cond);
- OPRND (disp24) = f_disp24;
+ OPRND (disp24) = pc + f_disp24;
OPRND (pc) = CPU (h_pc);
#undef OPRND
}
BREAK (read);
- CASE (read, READ_FMT_15_BRA8) : /* e.g. bra $disp8 */
+ CASE (read, READ_FMT_16_BRA8) : /* e.g. bra $disp8 */
{
-#define OPRND(f) par_exec->operands.fmt_15_bra8.f
- EXTRACT_FMT_15_BRA8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_15_BRA8_CODE
+#define OPRND(f) par_exec->operands.fmt_16_bra8.f
+ EXTRACT_FMT_16_BRA8_VARS /* f-op1 f-r1 f-disp8 */
+ EXTRACT_FMT_16_BRA8_CODE
/* Fetch the input operands for the semantic handler. */
- OPRND (disp8) = f_disp8;
+ RECORD_IADDR (OPRND (disp8), (pc & -4L) + f_disp8);
#undef OPRND
}
BREAK (read);
- CASE (read, READ_FMT_16_BRA24) : /* e.g. bra $disp24 */
+ CASE (read, READ_FMT_17_BRA24) : /* e.g. bra $disp24 */
{
-#define OPRND(f) par_exec->operands.fmt_16_bra24.f
- EXTRACT_FMT_16_BRA24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_16_BRA24_CODE
+#define OPRND(f) par_exec->operands.fmt_17_bra24.f
+ EXTRACT_FMT_17_BRA24_VARS /* f-op1 f-r1 f-disp24 */
+ EXTRACT_FMT_17_BRA24_CODE
/* Fetch the input operands for the semantic handler. */
- OPRND (disp24) = f_disp24;
+ OPRND (disp24) = pc + f_disp24;
#undef OPRND
}
BREAK (read);
- CASE (read, READ_FMT_17_CMP) : /* e.g. cmp $src1,$src2 */
+ CASE (read, READ_FMT_18_CMP) : /* e.g. cmp $src1,$src2 */
{
-#define OPRND(f) par_exec->operands.fmt_17_cmp.f
- EXTRACT_FMT_17_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_17_CMP_CODE
+#define OPRND(f) par_exec->operands.fmt_18_cmp.f
+ EXTRACT_FMT_18_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_18_CMP_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (src1) = CPU (h_gr[f_r1]);
}
BREAK (read);
- CASE (read, READ_FMT_18_CMPI) : /* e.g. cmpi $src2,#$simm16 */
+ CASE (read, READ_FMT_19_CMPI) : /* e.g. cmpi $src2,#$simm16 */
{
-#define OPRND(f) par_exec->operands.fmt_18_cmpi.f
- EXTRACT_FMT_18_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_18_CMPI_CODE
+#define OPRND(f) par_exec->operands.fmt_19_cmpi.f
+ EXTRACT_FMT_19_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_19_CMPI_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (simm16) = f_simm16;
}
BREAK (read);
- CASE (read, READ_FMT_19_CMPUI) : /* e.g. cmpui $src2,#$uimm16 */
+ CASE (read, READ_FMT_20_CMPUI) : /* e.g. cmpui $src2,#$uimm16 */
{
-#define OPRND(f) par_exec->operands.fmt_19_cmpui.f
- EXTRACT_FMT_19_CMPUI_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_19_CMPUI_CODE
+#define OPRND(f) par_exec->operands.fmt_20_cmpui.f
+ EXTRACT_FMT_20_CMPUI_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
+ EXTRACT_FMT_20_CMPUI_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (src2) = CPU (h_gr[f_r2]);
}
BREAK (read);
- CASE (read, READ_FMT_20_CMPZ) : /* e.g. cmpz $src2 */
+ CASE (read, READ_FMT_21_CMPZ) : /* e.g. cmpz $src2 */
{
-#define OPRND(f) par_exec->operands.fmt_20_cmpz.f
- EXTRACT_FMT_20_CMPZ_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_20_CMPZ_CODE
+#define OPRND(f) par_exec->operands.fmt_21_cmpz.f
+ EXTRACT_FMT_21_CMPZ_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_21_CMPZ_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (src2) = CPU (h_gr[f_r2]);
}
BREAK (read);
- CASE (read, READ_FMT_21_DIV) : /* e.g. div $dr,$sr */
+ CASE (read, READ_FMT_22_DIV) : /* e.g. div $dr,$sr */
{
-#define OPRND(f) par_exec->operands.fmt_21_div.f
- EXTRACT_FMT_21_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_21_DIV_CODE
+#define OPRND(f) par_exec->operands.fmt_22_div.f
+ EXTRACT_FMT_22_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_22_DIV_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (dr) = CPU (h_gr[f_r1]);
}
BREAK (read);
- CASE (read, READ_FMT_22_JC) : /* e.g. jc $sr */
+ CASE (read, READ_FMT_23_JC) : /* e.g. jc $sr */
{
-#define OPRND(f) par_exec->operands.fmt_22_jc.f
- EXTRACT_FMT_22_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_22_JC_CODE
+#define OPRND(f) par_exec->operands.fmt_23_jc.f
+ EXTRACT_FMT_23_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_23_JC_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (condbit) = CPU (h_cond);
}
BREAK (read);
- CASE (read, READ_FMT_23_JL) : /* e.g. jl $sr */
+ CASE (read, READ_FMT_24_JL) : /* e.g. jl $sr */
{
-#define OPRND(f) par_exec->operands.fmt_23_jl.f
- EXTRACT_FMT_23_JL_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_23_JL_CODE
+#define OPRND(f) par_exec->operands.fmt_24_jl.f
+ EXTRACT_FMT_24_JL_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_24_JL_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (pc) = CPU (h_pc);
}
BREAK (read);
- CASE (read, READ_FMT_24_JMP) : /* e.g. jmp $sr */
+ CASE (read, READ_FMT_25_JMP) : /* e.g. jmp $sr */
{
-#define OPRND(f) par_exec->operands.fmt_24_jmp.f
- EXTRACT_FMT_24_JMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_24_JMP_CODE
+#define OPRND(f) par_exec->operands.fmt_25_jmp.f
+ EXTRACT_FMT_25_JMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_25_JMP_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (sr) = CPU (h_gr[f_r2]);
}
BREAK (read);
- CASE (read, READ_FMT_25_LD) : /* e.g. ld $dr,@$sr */
+ CASE (read, READ_FMT_26_LD) : /* e.g. ld $dr,@$sr */
{
-#define OPRND(f) par_exec->operands.fmt_25_ld.f
- EXTRACT_FMT_25_LD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_25_LD_CODE
+#define OPRND(f) par_exec->operands.fmt_26_ld.f
+ EXTRACT_FMT_26_LD_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_26_LD_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (h_memory_sr) = GETMEMSI (current_cpu, CPU (h_gr[f_r2]));
}
BREAK (read);
- CASE (read, READ_FMT_26_LD_D) : /* e.g. ld $dr,@($slo16,$sr) */
+ CASE (read, READ_FMT_27_LD_D) : /* e.g. ld $dr,@($slo16,$sr) */
{
-#define OPRND(f) par_exec->operands.fmt_26_ld_d.f
- EXTRACT_FMT_26_LD_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_26_LD_D_CODE
+#define OPRND(f) par_exec->operands.fmt_27_ld_d.f
+ EXTRACT_FMT_27_LD_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_27_LD_D_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (h_memory_add_WI_sr_slo16) = GETMEMSI (current_cpu, ADDSI (CPU (h_gr[f_r2]), f_simm16));
}
BREAK (read);
- CASE (read, READ_FMT_27_LDB) : /* e.g. ldb $dr,@$sr */
+ CASE (read, READ_FMT_28_LDB) : /* e.g. ldb $dr,@$sr */
{
-#define OPRND(f) par_exec->operands.fmt_27_ldb.f
- EXTRACT_FMT_27_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_27_LDB_CODE
+#define OPRND(f) par_exec->operands.fmt_28_ldb.f
+ EXTRACT_FMT_28_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_28_LDB_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (h_memory_sr) = GETMEMQI (current_cpu, CPU (h_gr[f_r2]));
}
BREAK (read);
- CASE (read, READ_FMT_28_LDB_D) : /* e.g. ldb $dr,@($slo16,$sr) */
+ CASE (read, READ_FMT_29_LDB_D) : /* e.g. ldb $dr,@($slo16,$sr) */
{
-#define OPRND(f) par_exec->operands.fmt_28_ldb_d.f
- EXTRACT_FMT_28_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_28_LDB_D_CODE
+#define OPRND(f) par_exec->operands.fmt_29_ldb_d.f
+ EXTRACT_FMT_29_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_29_LDB_D_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (h_memory_add_WI_sr_slo16) = GETMEMQI (current_cpu, ADDSI (CPU (h_gr[f_r2]), f_simm16));
}
BREAK (read);
- CASE (read, READ_FMT_29_LDH) : /* e.g. ldh $dr,@$sr */
+ CASE (read, READ_FMT_30_LDH) : /* e.g. ldh $dr,@$sr */
{
-#define OPRND(f) par_exec->operands.fmt_29_ldh.f
- EXTRACT_FMT_29_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_29_LDH_CODE
+#define OPRND(f) par_exec->operands.fmt_30_ldh.f
+ EXTRACT_FMT_30_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_30_LDH_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (h_memory_sr) = GETMEMHI (current_cpu, CPU (h_gr[f_r2]));
}
BREAK (read);
- CASE (read, READ_FMT_30_LDH_D) : /* e.g. ldh $dr,@($slo16,$sr) */
+ CASE (read, READ_FMT_31_LDH_D) : /* e.g. ldh $dr,@($slo16,$sr) */
{
-#define OPRND(f) par_exec->operands.fmt_30_ldh_d.f
- EXTRACT_FMT_30_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_30_LDH_D_CODE
+#define OPRND(f) par_exec->operands.fmt_31_ldh_d.f
+ EXTRACT_FMT_31_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_31_LDH_D_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (h_memory_add_WI_sr_slo16) = GETMEMHI (current_cpu, ADDSI (CPU (h_gr[f_r2]), f_simm16));
}
BREAK (read);
- CASE (read, READ_FMT_31_LD24) : /* e.g. ld24 $dr,#$uimm24 */
+ CASE (read, READ_FMT_32_LD_PLUS) : /* e.g. ld $dr,@$sr+ */
{
-#define OPRND(f) par_exec->operands.fmt_31_ld24.f
- EXTRACT_FMT_31_LD24_VARS /* f-op1 f-r1 f-uimm24 */
- EXTRACT_FMT_31_LD24_CODE
+#define OPRND(f) par_exec->operands.fmt_32_ld_plus.f
+ EXTRACT_FMT_32_LD_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_32_LD_PLUS_CODE
+
+ /* Fetch the input operands for the semantic handler. */
+ OPRND (h_memory_sr) = GETMEMSI (current_cpu, CPU (h_gr[f_r2]));
+ OPRND (sr) = CPU (h_gr[f_r2]);
+#undef OPRND
+ }
+ BREAK (read);
+
+ CASE (read, READ_FMT_33_LD24) : /* e.g. ld24 $dr,#$uimm24 */
+ {
+#define OPRND(f) par_exec->operands.fmt_33_ld24.f
+ EXTRACT_FMT_33_LD24_VARS /* f-op1 f-r1 f-uimm24 */
+ EXTRACT_FMT_33_LD24_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (uimm24) = f_uimm24;
}
BREAK (read);
- CASE (read, READ_FMT_32_LDI8) : /* e.g. ldi $dr,#$simm8 */
+ CASE (read, READ_FMT_34_LDI8) : /* e.g. ldi $dr,#$simm8 */
{
-#define OPRND(f) par_exec->operands.fmt_32_ldi8.f
- EXTRACT_FMT_32_LDI8_VARS /* f-op1 f-r1 f-simm8 */
- EXTRACT_FMT_32_LDI8_CODE
+#define OPRND(f) par_exec->operands.fmt_34_ldi8.f
+ EXTRACT_FMT_34_LDI8_VARS /* f-op1 f-r1 f-simm8 */
+ EXTRACT_FMT_34_LDI8_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (simm8) = f_simm8;
}
BREAK (read);
- CASE (read, READ_FMT_33_LDI16) : /* e.g. ldi $dr,$slo16 */
+ CASE (read, READ_FMT_35_LDI16) : /* e.g. ldi $dr,$slo16 */
{
-#define OPRND(f) par_exec->operands.fmt_33_ldi16.f
- EXTRACT_FMT_33_LDI16_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_33_LDI16_CODE
+#define OPRND(f) par_exec->operands.fmt_35_ldi16.f
+ EXTRACT_FMT_35_LDI16_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_35_LDI16_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (slo16) = f_simm16;
}
BREAK (read);
- CASE (read, READ_FMT_34_MACHI_A) : /* e.g. machi $src1,$src2,$acc */
+ CASE (read, READ_FMT_36_LOCK) : /* e.g. lock $dr,@$sr */
+ {
+#define OPRND(f) par_exec->operands.fmt_36_lock.f
+ EXTRACT_FMT_36_LOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_36_LOCK_CODE
+
+ /* Fetch the input operands for the semantic handler. */
+ OPRND (dr) = CPU (h_gr[f_r1]);
+ OPRND (sr) = CPU (h_gr[f_r2]);
+#undef OPRND
+ }
+ BREAK (read);
+
+ CASE (read, READ_FMT_37_MACHI_A) : /* e.g. machi $src1,$src2,$acc */
{
-#define OPRND(f) par_exec->operands.fmt_34_machi_a.f
- EXTRACT_FMT_34_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
- EXTRACT_FMT_34_MACHI_A_CODE
+#define OPRND(f) par_exec->operands.fmt_37_machi_a.f
+ EXTRACT_FMT_37_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
+ EXTRACT_FMT_37_MACHI_A_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (acc) = m32rx_h_accums_get (current_cpu, f_acc);
}
BREAK (read);
- CASE (read, READ_FMT_35_MULHI_A) : /* e.g. mulhi $src1,$src2,$acc */
+ CASE (read, READ_FMT_38_MULHI_A) : /* e.g. mulhi $src1,$src2,$acc */
{
-#define OPRND(f) par_exec->operands.fmt_35_mulhi_a.f
- EXTRACT_FMT_35_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
- EXTRACT_FMT_35_MULHI_A_CODE
+#define OPRND(f) par_exec->operands.fmt_38_mulhi_a.f
+ EXTRACT_FMT_38_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
+ EXTRACT_FMT_38_MULHI_A_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (src1) = CPU (h_gr[f_r1]);
}
BREAK (read);
- CASE (read, READ_FMT_36_MV) : /* e.g. mv $dr,$sr */
+ CASE (read, READ_FMT_39_MV) : /* e.g. mv $dr,$sr */
{
-#define OPRND(f) par_exec->operands.fmt_36_mv.f
- EXTRACT_FMT_36_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_36_MV_CODE
+#define OPRND(f) par_exec->operands.fmt_39_mv.f
+ EXTRACT_FMT_39_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_39_MV_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (sr) = CPU (h_gr[f_r2]);
}
BREAK (read);
- CASE (read, READ_FMT_37_MVFACHI_A) : /* e.g. mvfachi $dr,$accs */
+ CASE (read, READ_FMT_40_MVFACHI_A) : /* e.g. mvfachi $dr,$accs */
{
-#define OPRND(f) par_exec->operands.fmt_37_mvfachi_a.f
- EXTRACT_FMT_37_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
- EXTRACT_FMT_37_MVFACHI_A_CODE
+#define OPRND(f) par_exec->operands.fmt_40_mvfachi_a.f
+ EXTRACT_FMT_40_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
+ EXTRACT_FMT_40_MVFACHI_A_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (accs) = m32rx_h_accums_get (current_cpu, f_accs);
}
BREAK (read);
- CASE (read, READ_FMT_38_MVFC) : /* e.g. mvfc $dr,$scr */
+ CASE (read, READ_FMT_41_MVFC) : /* e.g. mvfc $dr,$scr */
{
-#define OPRND(f) par_exec->operands.fmt_38_mvfc.f
- EXTRACT_FMT_38_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_38_MVFC_CODE
+#define OPRND(f) par_exec->operands.fmt_41_mvfc.f
+ EXTRACT_FMT_41_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_41_MVFC_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (scr) = m32rx_h_cr_get (current_cpu, f_r2);
}
BREAK (read);
- CASE (read, READ_FMT_39_MVTACHI_A) : /* e.g. mvtachi $src1,$accs */
+ CASE (read, READ_FMT_42_MVTACHI_A) : /* e.g. mvtachi $src1,$accs */
{
-#define OPRND(f) par_exec->operands.fmt_39_mvtachi_a.f
- EXTRACT_FMT_39_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
- EXTRACT_FMT_39_MVTACHI_A_CODE
+#define OPRND(f) par_exec->operands.fmt_42_mvtachi_a.f
+ EXTRACT_FMT_42_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
+ EXTRACT_FMT_42_MVTACHI_A_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (accs) = m32rx_h_accums_get (current_cpu, f_accs);
}
BREAK (read);
- CASE (read, READ_FMT_40_MVTC) : /* e.g. mvtc $sr,$dcr */
+ CASE (read, READ_FMT_43_MVTC) : /* e.g. mvtc $sr,$dcr */
{
-#define OPRND(f) par_exec->operands.fmt_40_mvtc.f
- EXTRACT_FMT_40_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_40_MVTC_CODE
+#define OPRND(f) par_exec->operands.fmt_43_mvtc.f
+ EXTRACT_FMT_43_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_43_MVTC_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (sr) = CPU (h_gr[f_r2]);
}
BREAK (read);
- CASE (read, READ_FMT_41_NOP) : /* e.g. nop */
+ CASE (read, READ_FMT_44_NOP) : /* e.g. nop */
{
-#define OPRND(f) par_exec->operands.fmt_41_nop.f
- EXTRACT_FMT_41_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_41_NOP_CODE
+#define OPRND(f) par_exec->operands.fmt_44_nop.f
+ EXTRACT_FMT_44_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_44_NOP_CODE
/* Fetch the input operands for the semantic handler. */
#undef OPRND
}
BREAK (read);
- CASE (read, READ_FMT_42_RAC_D) : /* e.g. rac $accd */
+ CASE (read, READ_FMT_45_RAC_D) : /* e.g. rac $accd */
{
-#define OPRND(f) par_exec->operands.fmt_42_rac_d.f
- EXTRACT_FMT_42_RAC_D_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
- EXTRACT_FMT_42_RAC_D_CODE
+#define OPRND(f) par_exec->operands.fmt_45_rac_d.f
+ EXTRACT_FMT_45_RAC_D_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
+ EXTRACT_FMT_45_RAC_D_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (accum) = CPU (h_accum);
}
BREAK (read);
- CASE (read, READ_FMT_43_RAC_DS) : /* e.g. rac $accd,$accs */
+ CASE (read, READ_FMT_46_RAC_DS) : /* e.g. rac $accd,$accs */
{
-#define OPRND(f) par_exec->operands.fmt_43_rac_ds.f
- EXTRACT_FMT_43_RAC_DS_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
- EXTRACT_FMT_43_RAC_DS_CODE
+#define OPRND(f) par_exec->operands.fmt_46_rac_ds.f
+ EXTRACT_FMT_46_RAC_DS_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
+ EXTRACT_FMT_46_RAC_DS_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (accs) = m32rx_h_accums_get (current_cpu, f_accs);
}
BREAK (read);
- CASE (read, READ_FMT_44_RAC_DSI) : /* e.g. rac $accd,$accs,#$imm1 */
+ CASE (read, READ_FMT_47_RAC_DSI) : /* e.g. rac $accd,$accs,#$imm1 */
{
-#define OPRND(f) par_exec->operands.fmt_44_rac_dsi.f
- EXTRACT_FMT_44_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
- EXTRACT_FMT_44_RAC_DSI_CODE
+#define OPRND(f) par_exec->operands.fmt_47_rac_dsi.f
+ EXTRACT_FMT_47_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
+ EXTRACT_FMT_47_RAC_DSI_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (accs) = m32rx_h_accums_get (current_cpu, f_accs);
}
BREAK (read);
- CASE (read, READ_FMT_45_RTE) : /* e.g. rte */
+ CASE (read, READ_FMT_48_RTE) : /* e.g. rte */
{
-#define OPRND(f) par_exec->operands.fmt_45_rte.f
- EXTRACT_FMT_45_RTE_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_45_RTE_CODE
+#define OPRND(f) par_exec->operands.fmt_48_rte.f
+ EXTRACT_FMT_48_RTE_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_48_RTE_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (h_bcond_0) = CPU (h_bcond);
}
BREAK (read);
- CASE (read, READ_FMT_46_SETH) : /* e.g. seth $dr,#$hi16 */
+ CASE (read, READ_FMT_49_SETH) : /* e.g. seth $dr,#$hi16 */
{
-#define OPRND(f) par_exec->operands.fmt_46_seth.f
- EXTRACT_FMT_46_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */
- EXTRACT_FMT_46_SETH_CODE
+#define OPRND(f) par_exec->operands.fmt_49_seth.f
+ EXTRACT_FMT_49_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */
+ EXTRACT_FMT_49_SETH_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (hi16) = f_hi16;
}
BREAK (read);
- CASE (read, READ_FMT_47_SLLI) : /* e.g. slli $dr,#$uimm5 */
+ CASE (read, READ_FMT_50_SLL3) : /* e.g. sll3 $dr,$sr,#$simm16 */
{
-#define OPRND(f) par_exec->operands.fmt_47_slli.f
- EXTRACT_FMT_47_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
- EXTRACT_FMT_47_SLLI_CODE
+#define OPRND(f) par_exec->operands.fmt_50_sll3.f
+ EXTRACT_FMT_50_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_50_SLL3_CODE
+
+ /* Fetch the input operands for the semantic handler. */
+ OPRND (simm16) = f_simm16;
+ OPRND (sr) = CPU (h_gr[f_r2]);
+#undef OPRND
+ }
+ BREAK (read);
+
+ CASE (read, READ_FMT_51_SLLI) : /* e.g. slli $dr,#$uimm5 */
+ {
+#define OPRND(f) par_exec->operands.fmt_51_slli.f
+ EXTRACT_FMT_51_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
+ EXTRACT_FMT_51_SLLI_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (dr) = CPU (h_gr[f_r1]);
}
BREAK (read);
- CASE (read, READ_FMT_48_ST_D) : /* e.g. st $src1,@($slo16,$src2) */
+ CASE (read, READ_FMT_52_ST) : /* e.g. st $src1,@$src2 */
{
-#define OPRND(f) par_exec->operands.fmt_48_st_d.f
- EXTRACT_FMT_48_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_48_ST_D_CODE
+#define OPRND(f) par_exec->operands.fmt_52_st.f
+ EXTRACT_FMT_52_ST_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_52_ST_CODE
+
+ /* Fetch the input operands for the semantic handler. */
+ OPRND (src1) = CPU (h_gr[f_r1]);
+ OPRND (src2) = CPU (h_gr[f_r2]);
+#undef OPRND
+ }
+ BREAK (read);
+
+ CASE (read, READ_FMT_53_ST_D) : /* e.g. st $src1,@($slo16,$src2) */
+ {
+#define OPRND(f) par_exec->operands.fmt_53_st_d.f
+ EXTRACT_FMT_53_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_53_ST_D_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (slo16) = f_simm16;
}
BREAK (read);
- CASE (read, READ_FMT_49_TRAP) : /* e.g. trap #$uimm4 */
+ CASE (read, READ_FMT_54_STB) : /* e.g. stb $src1,@$src2 */
+ {
+#define OPRND(f) par_exec->operands.fmt_54_stb.f
+ EXTRACT_FMT_54_STB_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_54_STB_CODE
+
+ /* Fetch the input operands for the semantic handler. */
+ OPRND (src1) = CPU (h_gr[f_r1]);
+ OPRND (src2) = CPU (h_gr[f_r2]);
+#undef OPRND
+ }
+ BREAK (read);
+
+ CASE (read, READ_FMT_55_STB_D) : /* e.g. stb $src1,@($slo16,$src2) */
{
-#define OPRND(f) par_exec->operands.fmt_49_trap.f
- EXTRACT_FMT_49_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */
- EXTRACT_FMT_49_TRAP_CODE
+#define OPRND(f) par_exec->operands.fmt_55_stb_d.f
+ EXTRACT_FMT_55_STB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_55_STB_D_CODE
+
+ /* Fetch the input operands for the semantic handler. */
+ OPRND (slo16) = f_simm16;
+ OPRND (src1) = CPU (h_gr[f_r1]);
+ OPRND (src2) = CPU (h_gr[f_r2]);
+#undef OPRND
+ }
+ BREAK (read);
+
+ CASE (read, READ_FMT_56_STH) : /* e.g. sth $src1,@$src2 */
+ {
+#define OPRND(f) par_exec->operands.fmt_56_sth.f
+ EXTRACT_FMT_56_STH_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_56_STH_CODE
+
+ /* Fetch the input operands for the semantic handler. */
+ OPRND (src1) = CPU (h_gr[f_r1]);
+ OPRND (src2) = CPU (h_gr[f_r2]);
+#undef OPRND
+ }
+ BREAK (read);
+
+ CASE (read, READ_FMT_57_STH_D) : /* e.g. sth $src1,@($slo16,$src2) */
+ {
+#define OPRND(f) par_exec->operands.fmt_57_sth_d.f
+ EXTRACT_FMT_57_STH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_57_STH_D_CODE
+
+ /* Fetch the input operands for the semantic handler. */
+ OPRND (slo16) = f_simm16;
+ OPRND (src1) = CPU (h_gr[f_r1]);
+ OPRND (src2) = CPU (h_gr[f_r2]);
+#undef OPRND
+ }
+ BREAK (read);
+
+ CASE (read, READ_FMT_58_ST_PLUS) : /* e.g. st $src1,@+$src2 */
+ {
+#define OPRND(f) par_exec->operands.fmt_58_st_plus.f
+ EXTRACT_FMT_58_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_58_ST_PLUS_CODE
+
+ /* Fetch the input operands for the semantic handler. */
+ OPRND (src1) = CPU (h_gr[f_r1]);
+ OPRND (src2) = CPU (h_gr[f_r2]);
+#undef OPRND
+ }
+ BREAK (read);
+
+ CASE (read, READ_FMT_59_TRAP) : /* e.g. trap #$uimm4 */
+ {
+#define OPRND(f) par_exec->operands.fmt_59_trap.f
+ EXTRACT_FMT_59_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */
+ EXTRACT_FMT_59_TRAP_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (uimm4) = f_uimm4;
}
BREAK (read);
- CASE (read, READ_FMT_50_SATB) : /* e.g. satb $dr,$src2 */
+ CASE (read, READ_FMT_60_UNLOCK) : /* e.g. unlock $src1,@$src2 */
{
-#define OPRND(f) par_exec->operands.fmt_50_satb.f
- EXTRACT_FMT_50_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_50_SATB_CODE
+#define OPRND(f) par_exec->operands.fmt_60_unlock.f
+ EXTRACT_FMT_60_UNLOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_60_UNLOCK_CODE
/* Fetch the input operands for the semantic handler. */
+ OPRND (src1) = CPU (h_gr[f_r1]);
OPRND (src2) = CPU (h_gr[f_r2]);
#undef OPRND
}
BREAK (read);
- CASE (read, READ_FMT_51_SAT) : /* e.g. sat $dr,$src2 */
+ CASE (read, READ_FMT_61_SATB) : /* e.g. satb $dr,$sr */
+ {
+#define OPRND(f) par_exec->operands.fmt_61_satb.f
+ EXTRACT_FMT_61_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
+ EXTRACT_FMT_61_SATB_CODE
+
+ /* Fetch the input operands for the semantic handler. */
+ OPRND (sr) = CPU (h_gr[f_r2]);
+#undef OPRND
+ }
+ BREAK (read);
+
+ CASE (read, READ_FMT_62_SAT) : /* e.g. sat $dr,$sr */
{
-#define OPRND(f) par_exec->operands.fmt_51_sat.f
- EXTRACT_FMT_51_SAT_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_51_SAT_CODE
+#define OPRND(f) par_exec->operands.fmt_62_sat.f
+ EXTRACT_FMT_62_SAT_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
+ EXTRACT_FMT_62_SAT_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (condbit) = CPU (h_cond);
- OPRND (src2) = CPU (h_gr[f_r2]);
+ OPRND (sr) = CPU (h_gr[f_r2]);
#undef OPRND
}
BREAK (read);
- CASE (read, READ_FMT_52_SADD) : /* e.g. sadd */
+ CASE (read, READ_FMT_63_SADD) : /* e.g. sadd */
{
-#define OPRND(f) par_exec->operands.fmt_52_sadd.f
- EXTRACT_FMT_52_SADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_52_SADD_CODE
+#define OPRND(f) par_exec->operands.fmt_63_sadd.f
+ EXTRACT_FMT_63_SADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_63_SADD_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (h_accums_0) = m32rx_h_accums_get (current_cpu, 0);
}
BREAK (read);
- CASE (read, READ_FMT_53_MACWU1) : /* e.g. macwu1 $src1,$src2 */
+ CASE (read, READ_FMT_64_MACWU1) : /* e.g. macwu1 $src1,$src2 */
{
-#define OPRND(f) par_exec->operands.fmt_53_macwu1.f
- EXTRACT_FMT_53_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_53_MACWU1_CODE
+#define OPRND(f) par_exec->operands.fmt_64_macwu1.f
+ EXTRACT_FMT_64_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_64_MACWU1_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (h_accums_1) = m32rx_h_accums_get (current_cpu, 1);
}
BREAK (read);
- CASE (read, READ_FMT_54_MSBLO) : /* e.g. msblo $src1,$src2 */
+ CASE (read, READ_FMT_65_MSBLO) : /* e.g. msblo $src1,$src2 */
{
-#define OPRND(f) par_exec->operands.fmt_54_msblo.f
- EXTRACT_FMT_54_MSBLO_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_54_MSBLO_CODE
+#define OPRND(f) par_exec->operands.fmt_65_msblo.f
+ EXTRACT_FMT_65_MSBLO_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_65_MSBLO_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (accum) = CPU (h_accum);
}
BREAK (read);
- CASE (read, READ_FMT_55_SC) : /* e.g. sc */
+ CASE (read, READ_FMT_66_MULWU1) : /* e.g. mulwu1 $src1,$src2 */
+ {
+#define OPRND(f) par_exec->operands.fmt_66_mulwu1.f
+ EXTRACT_FMT_66_MULWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_66_MULWU1_CODE
+
+ /* Fetch the input operands for the semantic handler. */
+ OPRND (src1) = CPU (h_gr[f_r1]);
+ OPRND (src2) = CPU (h_gr[f_r2]);
+#undef OPRND
+ }
+ BREAK (read);
+
+ CASE (read, READ_FMT_67_SC) : /* e.g. sc */
{
-#define OPRND(f) par_exec->operands.fmt_55_sc.f
- EXTRACT_FMT_55_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_55_SC_CODE
+#define OPRND(f) par_exec->operands.fmt_67_sc.f
+ EXTRACT_FMT_67_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_67_SC_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (condbit) = CPU (h_cond);
SEM_FN_NAME (m32rx,addv) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_0_add.f
+#define OPRND(f) par_exec->operands.fmt_5_addv.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_0_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_0_ADD_CODE
+ EXTRACT_FMT_5_ADDV_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_5_ADDV_CODE
do {
BI temp1;SI temp0;
SEM_FN_NAME (m32rx,addv3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_5_addv3.f
+#define OPRND(f) par_exec->operands.fmt_6_addv3.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
- EXTRACT_FMT_5_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_5_ADDV3_CODE
+ EXTRACT_FMT_6_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_6_ADDV3_CODE
do {
BI temp1;SI temp0;
SEM_FN_NAME (m32rx,addx) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_6_addx.f
+#define OPRND(f) par_exec->operands.fmt_7_addx.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_6_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_6_ADDX_CODE
+ EXTRACT_FMT_7_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_7_ADDX_CODE
do {
BI temp1;SI temp0;
SEM_FN_NAME (m32rx,bc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_7_bc8.f
+#define OPRND(f) par_exec->operands.fmt_8_bc8.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
int taken_p = 0;
- EXTRACT_FMT_7_BC8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_7_BC8_CODE
+ EXTRACT_FMT_8_BC8_VARS /* f-op1 f-r1 f-disp8 */
+ EXTRACT_FMT_8_BC8_CODE
if (OPRND (condbit)) {
BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
SEM_FN_NAME (m32rx,bc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_8_bc24.f
+#define OPRND(f) par_exec->operands.fmt_9_bc24.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
int taken_p = 0;
- EXTRACT_FMT_8_BC24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_8_BC24_CODE
+ EXTRACT_FMT_9_BC24_VARS /* f-op1 f-r1 f-disp24 */
+ EXTRACT_FMT_9_BC24_CODE
if (OPRND (condbit)) {
BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
SEM_FN_NAME (m32rx,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_9_beq.f
+#define OPRND(f) par_exec->operands.fmt_10_beq.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
int taken_p = 0;
- EXTRACT_FMT_9_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
- EXTRACT_FMT_9_BEQ_CODE
+ EXTRACT_FMT_10_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
+ EXTRACT_FMT_10_BEQ_CODE
if (EQSI (OPRND (src1), OPRND (src2))) {
BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
SEM_FN_NAME (m32rx,beqz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_10_beqz.f
+#define OPRND(f) par_exec->operands.fmt_11_beqz.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
int taken_p = 0;
- EXTRACT_FMT_10_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
- EXTRACT_FMT_10_BEQZ_CODE
+ EXTRACT_FMT_11_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
+ EXTRACT_FMT_11_BEQZ_CODE
if (EQSI (OPRND (src2), 0)) {
BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
SEM_FN_NAME (m32rx,bgez) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_10_beqz.f
+#define OPRND(f) par_exec->operands.fmt_11_beqz.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
int taken_p = 0;
- EXTRACT_FMT_10_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
- EXTRACT_FMT_10_BEQZ_CODE
+ EXTRACT_FMT_11_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
+ EXTRACT_FMT_11_BEQZ_CODE
if (GESI (OPRND (src2), 0)) {
BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
SEM_FN_NAME (m32rx,bgtz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_10_beqz.f
+#define OPRND(f) par_exec->operands.fmt_11_beqz.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
int taken_p = 0;
- EXTRACT_FMT_10_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
- EXTRACT_FMT_10_BEQZ_CODE
+ EXTRACT_FMT_11_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
+ EXTRACT_FMT_11_BEQZ_CODE
if (GTSI (OPRND (src2), 0)) {
BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
SEM_FN_NAME (m32rx,blez) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_10_beqz.f
+#define OPRND(f) par_exec->operands.fmt_11_beqz.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
int taken_p = 0;
- EXTRACT_FMT_10_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
- EXTRACT_FMT_10_BEQZ_CODE
+ EXTRACT_FMT_11_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
+ EXTRACT_FMT_11_BEQZ_CODE
if (LESI (OPRND (src2), 0)) {
BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
SEM_FN_NAME (m32rx,bltz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_10_beqz.f
+#define OPRND(f) par_exec->operands.fmt_11_beqz.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
int taken_p = 0;
- EXTRACT_FMT_10_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
- EXTRACT_FMT_10_BEQZ_CODE
+ EXTRACT_FMT_11_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
+ EXTRACT_FMT_11_BEQZ_CODE
if (LTSI (OPRND (src2), 0)) {
BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
SEM_FN_NAME (m32rx,bnez) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_10_beqz.f
+#define OPRND(f) par_exec->operands.fmt_11_beqz.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
int taken_p = 0;
- EXTRACT_FMT_10_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
- EXTRACT_FMT_10_BEQZ_CODE
+ EXTRACT_FMT_11_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
+ EXTRACT_FMT_11_BEQZ_CODE
if (NESI (OPRND (src2), 0)) {
BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
SEM_FN_NAME (m32rx,bl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_11_bl8.f
+#define OPRND(f) par_exec->operands.fmt_12_bl8.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
int taken_p = 0;
- EXTRACT_FMT_11_BL8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_11_BL8_CODE
+ EXTRACT_FMT_12_BL8_VARS /* f-op1 f-r1 f-disp8 */
+ EXTRACT_FMT_12_BL8_CODE
do {
CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
SEM_FN_NAME (m32rx,bl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_12_bl24.f
+#define OPRND(f) par_exec->operands.fmt_13_bl24.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
int taken_p = 0;
- EXTRACT_FMT_12_BL24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_12_BL24_CODE
+ EXTRACT_FMT_13_BL24_VARS /* f-op1 f-r1 f-disp24 */
+ EXTRACT_FMT_13_BL24_CODE
do {
CPU (h_gr[14]) = ADDSI (OPRND (pc), 4);
SEM_FN_NAME (m32rx,bcl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_13_bcl8.f
+#define OPRND(f) par_exec->operands.fmt_14_bcl8.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
int taken_p = 0;
- EXTRACT_FMT_13_BCL8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_13_BCL8_CODE
+ EXTRACT_FMT_14_BCL8_VARS /* f-op1 f-r1 f-disp8 */
+ EXTRACT_FMT_14_BCL8_CODE
if (OPRND (condbit)) {
do {
SEM_FN_NAME (m32rx,bcl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_14_bcl24.f
+#define OPRND(f) par_exec->operands.fmt_15_bcl24.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
int taken_p = 0;
- EXTRACT_FMT_14_BCL24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_14_BCL24_CODE
+ EXTRACT_FMT_15_BCL24_VARS /* f-op1 f-r1 f-disp24 */
+ EXTRACT_FMT_15_BCL24_CODE
if (OPRND (condbit)) {
do {
SEM_FN_NAME (m32rx,bnc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_7_bc8.f
+#define OPRND(f) par_exec->operands.fmt_8_bc8.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
int taken_p = 0;
- EXTRACT_FMT_7_BC8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_7_BC8_CODE
+ EXTRACT_FMT_8_BC8_VARS /* f-op1 f-r1 f-disp8 */
+ EXTRACT_FMT_8_BC8_CODE
if (NOTBI (OPRND (condbit))) {
BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
SEM_FN_NAME (m32rx,bnc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_8_bc24.f
+#define OPRND(f) par_exec->operands.fmt_9_bc24.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
int taken_p = 0;
- EXTRACT_FMT_8_BC24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_8_BC24_CODE
+ EXTRACT_FMT_9_BC24_VARS /* f-op1 f-r1 f-disp24 */
+ EXTRACT_FMT_9_BC24_CODE
if (NOTBI (OPRND (condbit))) {
BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
SEM_FN_NAME (m32rx,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_9_beq.f
+#define OPRND(f) par_exec->operands.fmt_10_beq.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
int taken_p = 0;
- EXTRACT_FMT_9_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
- EXTRACT_FMT_9_BEQ_CODE
+ EXTRACT_FMT_10_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
+ EXTRACT_FMT_10_BEQ_CODE
if (NESI (OPRND (src1), OPRND (src2))) {
BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
SEM_FN_NAME (m32rx,bra8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_15_bra8.f
+#define OPRND(f) par_exec->operands.fmt_16_bra8.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
int taken_p = 0;
- EXTRACT_FMT_15_BRA8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_15_BRA8_CODE
+ EXTRACT_FMT_16_BRA8_VARS /* f-op1 f-r1 f-disp8 */
+ EXTRACT_FMT_16_BRA8_CODE
BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
SEM_FN_NAME (m32rx,bra24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_16_bra24.f
+#define OPRND(f) par_exec->operands.fmt_17_bra24.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
int taken_p = 0;
- EXTRACT_FMT_16_BRA24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_16_BRA24_CODE
+ EXTRACT_FMT_17_BRA24_VARS /* f-op1 f-r1 f-disp24 */
+ EXTRACT_FMT_17_BRA24_CODE
BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
SEM_FN_NAME (m32rx,bncl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_13_bcl8.f
+#define OPRND(f) par_exec->operands.fmt_14_bcl8.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
int taken_p = 0;
- EXTRACT_FMT_13_BCL8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_13_BCL8_CODE
+ EXTRACT_FMT_14_BCL8_VARS /* f-op1 f-r1 f-disp8 */
+ EXTRACT_FMT_14_BCL8_CODE
if (NOTBI (OPRND (condbit))) {
do {
SEM_FN_NAME (m32rx,bncl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_14_bcl24.f
+#define OPRND(f) par_exec->operands.fmt_15_bcl24.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
int taken_p = 0;
- EXTRACT_FMT_14_BCL24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_14_BCL24_CODE
+ EXTRACT_FMT_15_BCL24_VARS /* f-op1 f-r1 f-disp24 */
+ EXTRACT_FMT_15_BCL24_CODE
if (NOTBI (OPRND (condbit))) {
do {
SEM_FN_NAME (m32rx,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_17_cmp.f
+#define OPRND(f) par_exec->operands.fmt_18_cmp.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_17_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_17_CMP_CODE
+ EXTRACT_FMT_18_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_18_CMP_CODE
CPU (h_cond) = LTSI (OPRND (src1), OPRND (src2));
TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
SEM_FN_NAME (m32rx,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_18_cmpi.f
+#define OPRND(f) par_exec->operands.fmt_19_cmpi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
- EXTRACT_FMT_18_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_18_CMPI_CODE
+ EXTRACT_FMT_19_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_19_CMPI_CODE
CPU (h_cond) = LTSI (OPRND (src2), OPRND (simm16));
TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
SEM_FN_NAME (m32rx,cmpu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_17_cmp.f
+#define OPRND(f) par_exec->operands.fmt_18_cmp.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_17_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_17_CMP_CODE
+ EXTRACT_FMT_18_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_18_CMP_CODE
CPU (h_cond) = LTUSI (OPRND (src1), OPRND (src2));
TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
SEM_FN_NAME (m32rx,cmpui) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_19_cmpui.f
+#define OPRND(f) par_exec->operands.fmt_20_cmpui.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
- EXTRACT_FMT_19_CMPUI_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_19_CMPUI_CODE
+ EXTRACT_FMT_20_CMPUI_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
+ EXTRACT_FMT_20_CMPUI_CODE
CPU (h_cond) = LTUSI (OPRND (src2), OPRND (uimm16));
TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
SEM_FN_NAME (m32rx,cmpeq) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_17_cmp.f
+#define OPRND(f) par_exec->operands.fmt_18_cmp.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_17_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_17_CMP_CODE
+ EXTRACT_FMT_18_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_18_CMP_CODE
CPU (h_cond) = EQSI (OPRND (src1), OPRND (src2));
TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
SEM_FN_NAME (m32rx,cmpz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_20_cmpz.f
+#define OPRND(f) par_exec->operands.fmt_21_cmpz.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_20_CMPZ_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_20_CMPZ_CODE
+ EXTRACT_FMT_21_CMPZ_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_21_CMPZ_CODE
CPU (h_cond) = EQSI (OPRND (src2), 0);
TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
SEM_FN_NAME (m32rx,div) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_21_div.f
+#define OPRND(f) par_exec->operands.fmt_22_div.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
- EXTRACT_FMT_21_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_21_DIV_CODE
+ EXTRACT_FMT_22_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_22_DIV_CODE
if (NESI (OPRND (sr), 0)) {
CPU (h_gr[f_r1]) = DIVSI (OPRND (dr), OPRND (sr));
SEM_FN_NAME (m32rx,divu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_21_div.f
+#define OPRND(f) par_exec->operands.fmt_22_div.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
- EXTRACT_FMT_21_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_21_DIV_CODE
+ EXTRACT_FMT_22_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_22_DIV_CODE
if (NESI (OPRND (sr), 0)) {
CPU (h_gr[f_r1]) = UDIVSI (OPRND (dr), OPRND (sr));
SEM_FN_NAME (m32rx,rem) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_21_div.f
+#define OPRND(f) par_exec->operands.fmt_22_div.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
- EXTRACT_FMT_21_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_21_DIV_CODE
+ EXTRACT_FMT_22_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_22_DIV_CODE
if (NESI (OPRND (sr), 0)) {
CPU (h_gr[f_r1]) = MODSI (OPRND (dr), OPRND (sr));
SEM_FN_NAME (m32rx,remu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_21_div.f
+#define OPRND(f) par_exec->operands.fmt_22_div.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
- EXTRACT_FMT_21_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_21_DIV_CODE
+ EXTRACT_FMT_22_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_22_DIV_CODE
if (NESI (OPRND (sr), 0)) {
CPU (h_gr[f_r1]) = UMODSI (OPRND (dr), OPRND (sr));
SEM_FN_NAME (m32rx,divh) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_21_div.f
+#define OPRND(f) par_exec->operands.fmt_22_div.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
- EXTRACT_FMT_21_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_21_DIV_CODE
+ EXTRACT_FMT_22_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_22_DIV_CODE
if (NESI (OPRND (sr), 0)) {
CPU (h_gr[f_r1]) = DIVSI (EXTHISI (TRUNCSIHI (OPRND (dr))), OPRND (sr));
SEM_FN_NAME (m32rx,jc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_22_jc.f
+#define OPRND(f) par_exec->operands.fmt_23_jc.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
int taken_p = 0;
- EXTRACT_FMT_22_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_22_JC_CODE
+ EXTRACT_FMT_23_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_23_JC_CODE
if (OPRND (condbit)) {
BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, ANDSI (OPRND (sr), -4)));
SEM_FN_NAME (m32rx,jnc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_22_jc.f
+#define OPRND(f) par_exec->operands.fmt_23_jc.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
int taken_p = 0;
- EXTRACT_FMT_22_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_22_JC_CODE
+ EXTRACT_FMT_23_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_23_JC_CODE
if (NOTBI (OPRND (condbit))) {
BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, ANDSI (OPRND (sr), -4)));
SEM_FN_NAME (m32rx,jl) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_23_jl.f
+#define OPRND(f) par_exec->operands.fmt_24_jl.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
int taken_p = 0;
- EXTRACT_FMT_23_JL_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_23_JL_CODE
+ EXTRACT_FMT_24_JL_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_24_JL_CODE
do {
SI temp1;SI temp0;
SEM_FN_NAME (m32rx,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_24_jmp.f
+#define OPRND(f) par_exec->operands.fmt_25_jmp.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
int taken_p = 0;
- EXTRACT_FMT_24_JMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_24_JMP_CODE
+ EXTRACT_FMT_25_JMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_25_JMP_CODE
BRANCH_NEW_PC (current_cpu, new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, OPRND (sr)));
SEM_FN_NAME (m32rx,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_25_ld.f
+#define OPRND(f) par_exec->operands.fmt_26_ld.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_25_LD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_25_LD_CODE
+ EXTRACT_FMT_26_LD_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_26_LD_CODE
CPU (h_gr[f_r1]) = OPRND (h_memory_sr);
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,ld_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_26_ld_d.f
+#define OPRND(f) par_exec->operands.fmt_27_ld_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
- EXTRACT_FMT_26_LD_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_26_LD_D_CODE
+ EXTRACT_FMT_27_LD_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_27_LD_D_CODE
CPU (h_gr[f_r1]) = OPRND (h_memory_add_WI_sr_slo16);
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,ldb) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_27_ldb.f
+#define OPRND(f) par_exec->operands.fmt_28_ldb.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_27_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_27_LDB_CODE
+ EXTRACT_FMT_28_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_28_LDB_CODE
CPU (h_gr[f_r1]) = EXTQISI (OPRND (h_memory_sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,ldb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_28_ldb_d.f
+#define OPRND(f) par_exec->operands.fmt_29_ldb_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
- EXTRACT_FMT_28_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_28_LDB_D_CODE
+ EXTRACT_FMT_29_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_29_LDB_D_CODE
CPU (h_gr[f_r1]) = EXTQISI (OPRND (h_memory_add_WI_sr_slo16));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,ldh) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_29_ldh.f
+#define OPRND(f) par_exec->operands.fmt_30_ldh.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_29_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_29_LDH_CODE
+ EXTRACT_FMT_30_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_30_LDH_CODE
CPU (h_gr[f_r1]) = EXTHISI (OPRND (h_memory_sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,ldh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_30_ldh_d.f
+#define OPRND(f) par_exec->operands.fmt_31_ldh_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
- EXTRACT_FMT_30_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_30_LDH_D_CODE
+ EXTRACT_FMT_31_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_31_LDH_D_CODE
CPU (h_gr[f_r1]) = EXTHISI (OPRND (h_memory_add_WI_sr_slo16));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_27_ldb.f
+#define OPRND(f) par_exec->operands.fmt_28_ldb.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_27_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_27_LDB_CODE
+ EXTRACT_FMT_28_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_28_LDB_CODE
CPU (h_gr[f_r1]) = ZEXTQISI (OPRND (h_memory_sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,ldub_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_28_ldb_d.f
+#define OPRND(f) par_exec->operands.fmt_29_ldb_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
- EXTRACT_FMT_28_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_28_LDB_D_CODE
+ EXTRACT_FMT_29_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_29_LDB_D_CODE
CPU (h_gr[f_r1]) = ZEXTQISI (OPRND (h_memory_add_WI_sr_slo16));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_29_ldh.f
+#define OPRND(f) par_exec->operands.fmt_30_ldh.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_29_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_29_LDH_CODE
+ EXTRACT_FMT_30_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_30_LDH_CODE
CPU (h_gr[f_r1]) = ZEXTHISI (OPRND (h_memory_sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,lduh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_30_ldh_d.f
+#define OPRND(f) par_exec->operands.fmt_31_ldh_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
- EXTRACT_FMT_30_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_30_LDH_D_CODE
+ EXTRACT_FMT_31_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_31_LDH_D_CODE
CPU (h_gr[f_r1]) = ZEXTHISI (OPRND (h_memory_add_WI_sr_slo16));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,ld_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_25_ld.f
+#define OPRND(f) par_exec->operands.fmt_32_ld_plus.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_25_LD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_25_LD_CODE
+ EXTRACT_FMT_32_LD_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_32_LD_PLUS_CODE
do {
SI temp1;SI temp0;
SEM_FN_NAME (m32rx,ld24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_31_ld24.f
+#define OPRND(f) par_exec->operands.fmt_33_ld24.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
- EXTRACT_FMT_31_LD24_VARS /* f-op1 f-r1 f-uimm24 */
- EXTRACT_FMT_31_LD24_CODE
+ EXTRACT_FMT_33_LD24_VARS /* f-op1 f-r1 f-uimm24 */
+ EXTRACT_FMT_33_LD24_CODE
CPU (h_gr[f_r1]) = OPRND (uimm24);
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_32_ldi8.f
+#define OPRND(f) par_exec->operands.fmt_34_ldi8.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_32_LDI8_VARS /* f-op1 f-r1 f-simm8 */
- EXTRACT_FMT_32_LDI8_CODE
+ EXTRACT_FMT_34_LDI8_VARS /* f-op1 f-r1 f-simm8 */
+ EXTRACT_FMT_34_LDI8_CODE
CPU (h_gr[f_r1]) = OPRND (simm8);
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,ldi16) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_33_ldi16.f
+#define OPRND(f) par_exec->operands.fmt_35_ldi16.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
- EXTRACT_FMT_33_LDI16_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_33_LDI16_CODE
+ EXTRACT_FMT_35_LDI16_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_35_LDI16_CODE
CPU (h_gr[f_r1]) = OPRND (slo16);
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,lock) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_0_add.f
+#define OPRND(f) par_exec->operands.fmt_36_lock.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_0_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_0_ADD_CODE
+ EXTRACT_FMT_36_LOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_36_LOCK_CODE
do_lock (current_cpu, OPRND (dr), OPRND (sr));
if (PROFILE_MODEL_P (current_cpu))
{
m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
m32rx_model_profile_insn (current_cpu, abuf);
}
#endif
SEM_FN_NAME (m32rx,machi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_34_machi_a.f
+#define OPRND(f) par_exec->operands.fmt_37_machi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_34_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
- EXTRACT_FMT_34_MACHI_A_CODE
+ EXTRACT_FMT_37_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
+ EXTRACT_FMT_37_MACHI_A_CODE
m32rx_h_accums_set (current_cpu, f_acc, SRADI (SLLDI (ADDDI (OPRND (acc), MULDI (EXTSIDI (ANDSI (OPRND (src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16))))), 8), 8));
TRACE_RESULT (current_cpu, "acc", 'D', m32rx_h_accums_get (current_cpu, f_acc));
SEM_FN_NAME (m32rx,maclo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_34_machi_a.f
+#define OPRND(f) par_exec->operands.fmt_37_machi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_34_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
- EXTRACT_FMT_34_MACHI_A_CODE
+ EXTRACT_FMT_37_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
+ EXTRACT_FMT_37_MACHI_A_CODE
m32rx_h_accums_set (current_cpu, f_acc, SRADI (SLLDI (ADDDI (OPRND (acc), MULDI (EXTSIDI (SLLSI (OPRND (src1), 16)), EXTHIDI (TRUNCSIHI (OPRND (src2))))), 8), 8));
TRACE_RESULT (current_cpu, "acc", 'D', m32rx_h_accums_get (current_cpu, f_acc));
SEM_FN_NAME (m32rx,mulhi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_35_mulhi_a.f
+#define OPRND(f) par_exec->operands.fmt_38_mulhi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_35_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
- EXTRACT_FMT_35_MULHI_A_CODE
+ EXTRACT_FMT_38_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
+ EXTRACT_FMT_38_MULHI_A_CODE
m32rx_h_accums_set (current_cpu, f_acc, SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (OPRND (src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16)))), 16), 16));
TRACE_RESULT (current_cpu, "acc", 'D', m32rx_h_accums_get (current_cpu, f_acc));
SEM_FN_NAME (m32rx,mullo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_35_mulhi_a.f
+#define OPRND(f) par_exec->operands.fmt_38_mulhi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_35_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
- EXTRACT_FMT_35_MULHI_A_CODE
+ EXTRACT_FMT_38_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
+ EXTRACT_FMT_38_MULHI_A_CODE
m32rx_h_accums_set (current_cpu, f_acc, SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (OPRND (src1), 16)), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 16), 16));
TRACE_RESULT (current_cpu, "acc", 'D', m32rx_h_accums_get (current_cpu, f_acc));
SEM_FN_NAME (m32rx,mv) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_36_mv.f
+#define OPRND(f) par_exec->operands.fmt_39_mv.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_36_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_36_MV_CODE
+ EXTRACT_FMT_39_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_39_MV_CODE
CPU (h_gr[f_r1]) = OPRND (sr);
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,mvfachi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_37_mvfachi_a.f
+#define OPRND(f) par_exec->operands.fmt_40_mvfachi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_37_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
- EXTRACT_FMT_37_MVFACHI_A_CODE
+ EXTRACT_FMT_40_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
+ EXTRACT_FMT_40_MVFACHI_A_CODE
CPU (h_gr[f_r1]) = TRUNCDISI (SRADI (OPRND (accs), 32));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,mvfaclo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_37_mvfachi_a.f
+#define OPRND(f) par_exec->operands.fmt_40_mvfachi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_37_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
- EXTRACT_FMT_37_MVFACHI_A_CODE
+ EXTRACT_FMT_40_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
+ EXTRACT_FMT_40_MVFACHI_A_CODE
CPU (h_gr[f_r1]) = TRUNCDISI (OPRND (accs));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,mvfacmi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_37_mvfachi_a.f
+#define OPRND(f) par_exec->operands.fmt_40_mvfachi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_37_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
- EXTRACT_FMT_37_MVFACHI_A_CODE
+ EXTRACT_FMT_40_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
+ EXTRACT_FMT_40_MVFACHI_A_CODE
CPU (h_gr[f_r1]) = TRUNCDISI (SRADI (OPRND (accs), 16));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,mvfc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_38_mvfc.f
+#define OPRND(f) par_exec->operands.fmt_41_mvfc.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_38_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_38_MVFC_CODE
+ EXTRACT_FMT_41_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_41_MVFC_CODE
CPU (h_gr[f_r1]) = OPRND (scr);
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,mvtachi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_39_mvtachi_a.f
+#define OPRND(f) par_exec->operands.fmt_42_mvtachi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_39_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
- EXTRACT_FMT_39_MVTACHI_A_CODE
+ EXTRACT_FMT_42_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
+ EXTRACT_FMT_42_MVTACHI_A_CODE
m32rx_h_accums_set (current_cpu, f_accs, ORDI (ANDDI (OPRND (accs), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (OPRND (src1)), 32)));
TRACE_RESULT (current_cpu, "accs", 'D', m32rx_h_accums_get (current_cpu, f_accs));
SEM_FN_NAME (m32rx,mvtaclo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_39_mvtachi_a.f
+#define OPRND(f) par_exec->operands.fmt_42_mvtachi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_39_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
- EXTRACT_FMT_39_MVTACHI_A_CODE
+ EXTRACT_FMT_42_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
+ EXTRACT_FMT_42_MVTACHI_A_CODE
-m32rx_h_accums_set (current_cpu, f_accs, ORDI (ANDDI (OPRND (accs), MAKEDI (0xffffffff, 0)), EXTSIDI (OPRND (src1))));
+m32rx_h_accums_set (current_cpu, f_accs, ORDI (ANDDI (OPRND (accs), MAKEDI (0xffffffff, 0)), ZEXTSIDI (OPRND (src1))));
TRACE_RESULT (current_cpu, "accs", 'D', m32rx_h_accums_get (current_cpu, f_accs));
#if WITH_PROFILE_MODEL_P
SEM_FN_NAME (m32rx,mvtc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_40_mvtc.f
+#define OPRND(f) par_exec->operands.fmt_43_mvtc.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_40_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_40_MVTC_CODE
+ EXTRACT_FMT_43_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_43_MVTC_CODE
m32rx_h_cr_set (current_cpu, f_r1, OPRND (sr));
TRACE_RESULT (current_cpu, "dcr", 'x', m32rx_h_cr_get (current_cpu, f_r1));
SEM_FN_NAME (m32rx,neg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_36_mv.f
+#define OPRND(f) par_exec->operands.fmt_39_mv.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_36_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_36_MV_CODE
+ EXTRACT_FMT_39_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_39_MV_CODE
CPU (h_gr[f_r1]) = NEGSI (OPRND (sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_41_nop.f
+#define OPRND(f) par_exec->operands.fmt_44_nop.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_41_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_41_NOP_CODE
+ EXTRACT_FMT_44_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_44_NOP_CODE
PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
SEM_FN_NAME (m32rx,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_36_mv.f
+#define OPRND(f) par_exec->operands.fmt_39_mv.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_36_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_36_MV_CODE
+ EXTRACT_FMT_39_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_39_MV_CODE
CPU (h_gr[f_r1]) = INVSI (OPRND (sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,rac_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_42_rac_d.f
+#define OPRND(f) par_exec->operands.fmt_45_rac_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_42_RAC_D_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
- EXTRACT_FMT_42_RAC_D_CODE
+ EXTRACT_FMT_45_RAC_D_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
+ EXTRACT_FMT_45_RAC_D_CODE
do {
DI tmp_tmp1;
SEM_FN_NAME (m32rx,rac_ds) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_43_rac_ds.f
+#define OPRND(f) par_exec->operands.fmt_46_rac_ds.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_43_RAC_DS_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
- EXTRACT_FMT_43_RAC_DS_CODE
+ EXTRACT_FMT_46_RAC_DS_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
+ EXTRACT_FMT_46_RAC_DS_CODE
do {
DI tmp_tmp1;
SEM_FN_NAME (m32rx,rac_dsi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_44_rac_dsi.f
+#define OPRND(f) par_exec->operands.fmt_47_rac_dsi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_44_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
- EXTRACT_FMT_44_RAC_DSI_CODE
+ EXTRACT_FMT_47_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
+ EXTRACT_FMT_47_RAC_DSI_CODE
do {
DI tmp_tmp1;
SEM_FN_NAME (m32rx,rach_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_42_rac_d.f
+#define OPRND(f) par_exec->operands.fmt_45_rac_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_42_RAC_D_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
- EXTRACT_FMT_42_RAC_D_CODE
+ EXTRACT_FMT_45_RAC_D_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
+ EXTRACT_FMT_45_RAC_D_CODE
do {
DI tmp_tmp1;
SEM_FN_NAME (m32rx,rach_ds) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_43_rac_ds.f
+#define OPRND(f) par_exec->operands.fmt_46_rac_ds.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_43_RAC_DS_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
- EXTRACT_FMT_43_RAC_DS_CODE
+ EXTRACT_FMT_46_RAC_DS_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
+ EXTRACT_FMT_46_RAC_DS_CODE
do {
DI tmp_tmp1;
SEM_FN_NAME (m32rx,rach_dsi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_44_rac_dsi.f
+#define OPRND(f) par_exec->operands.fmt_47_rac_dsi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_44_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
- EXTRACT_FMT_44_RAC_DSI_CODE
+ EXTRACT_FMT_47_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
+ EXTRACT_FMT_47_RAC_DSI_CODE
do {
DI tmp_tmp1;
SEM_FN_NAME (m32rx,rte) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_45_rte.f
+#define OPRND(f) par_exec->operands.fmt_48_rte.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
int taken_p = 0;
- EXTRACT_FMT_45_RTE_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_45_RTE_CODE
+ EXTRACT_FMT_48_RTE_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_48_RTE_CODE
do {
CPU (h_sm) = OPRND (h_bsm_0);
SEM_FN_NAME (m32rx,seth) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_46_seth.f
+#define OPRND(f) par_exec->operands.fmt_49_seth.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
- EXTRACT_FMT_46_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */
- EXTRACT_FMT_46_SETH_CODE
+ EXTRACT_FMT_49_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */
+ EXTRACT_FMT_49_SETH_CODE
CPU (h_gr[f_r1]) = SLLSI (OPRND (hi16), 16);
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,sll3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_5_addv3.f
+#define OPRND(f) par_exec->operands.fmt_50_sll3.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
- EXTRACT_FMT_5_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_5_ADDV3_CODE
+ EXTRACT_FMT_50_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_50_SLL3_CODE
CPU (h_gr[f_r1]) = SLLSI (OPRND (sr), ANDSI (OPRND (simm16), 31));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,slli) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_47_slli.f
+#define OPRND(f) par_exec->operands.fmt_51_slli.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_47_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
- EXTRACT_FMT_47_SLLI_CODE
+ EXTRACT_FMT_51_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
+ EXTRACT_FMT_51_SLLI_CODE
CPU (h_gr[f_r1]) = SLLSI (OPRND (dr), OPRND (uimm5));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,sra3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_5_addv3.f
+#define OPRND(f) par_exec->operands.fmt_50_sll3.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
- EXTRACT_FMT_5_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_5_ADDV3_CODE
+ EXTRACT_FMT_50_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_50_SLL3_CODE
CPU (h_gr[f_r1]) = SRASI (OPRND (sr), ANDSI (OPRND (simm16), 31));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,srai) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_47_slli.f
+#define OPRND(f) par_exec->operands.fmt_51_slli.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_47_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
- EXTRACT_FMT_47_SLLI_CODE
+ EXTRACT_FMT_51_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
+ EXTRACT_FMT_51_SLLI_CODE
CPU (h_gr[f_r1]) = SRASI (OPRND (dr), OPRND (uimm5));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,srl3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_5_addv3.f
+#define OPRND(f) par_exec->operands.fmt_50_sll3.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
- EXTRACT_FMT_5_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_5_ADDV3_CODE
+ EXTRACT_FMT_50_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_50_SLL3_CODE
CPU (h_gr[f_r1]) = SRLSI (OPRND (sr), ANDSI (OPRND (simm16), 31));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_47_slli.f
+#define OPRND(f) par_exec->operands.fmt_51_slli.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_47_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
- EXTRACT_FMT_47_SLLI_CODE
+ EXTRACT_FMT_51_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
+ EXTRACT_FMT_51_SLLI_CODE
CPU (h_gr[f_r1]) = SRLSI (OPRND (dr), OPRND (uimm5));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_17_cmp.f
+#define OPRND(f) par_exec->operands.fmt_52_st.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_17_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_17_CMP_CODE
+ EXTRACT_FMT_52_ST_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_52_ST_CODE
SETMEMSI (current_cpu, OPRND (src2), OPRND (src1));
TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMSI (current_cpu, OPRND (src2)));
SEM_FN_NAME (m32rx,st_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_48_st_d.f
+#define OPRND(f) par_exec->operands.fmt_53_st_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
- EXTRACT_FMT_48_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_48_ST_D_CODE
+ EXTRACT_FMT_53_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_53_ST_D_CODE
SETMEMSI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), OPRND (src1));
TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMSI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16))));
SEM_FN_NAME (m32rx,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_17_cmp.f
+#define OPRND(f) par_exec->operands.fmt_54_stb.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_17_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_17_CMP_CODE
+ EXTRACT_FMT_54_STB_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_54_STB_CODE
SETMEMQI (current_cpu, OPRND (src2), OPRND (src1));
TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMQI (current_cpu, OPRND (src2)));
SEM_FN_NAME (m32rx,stb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_48_st_d.f
+#define OPRND(f) par_exec->operands.fmt_55_stb_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
- EXTRACT_FMT_48_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_48_ST_D_CODE
+ EXTRACT_FMT_55_STB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_55_STB_D_CODE
SETMEMQI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), OPRND (src1));
TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMQI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16))));
SEM_FN_NAME (m32rx,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_17_cmp.f
+#define OPRND(f) par_exec->operands.fmt_56_sth.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_17_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_17_CMP_CODE
+ EXTRACT_FMT_56_STH_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_56_STH_CODE
SETMEMHI (current_cpu, OPRND (src2), OPRND (src1));
TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMHI (current_cpu, OPRND (src2)));
SEM_FN_NAME (m32rx,sth_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_48_st_d.f
+#define OPRND(f) par_exec->operands.fmt_57_sth_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
- EXTRACT_FMT_48_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_48_ST_D_CODE
+ EXTRACT_FMT_57_STH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_57_STH_D_CODE
SETMEMHI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), OPRND (src1));
TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMHI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16))));
SEM_FN_NAME (m32rx,st_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_17_cmp.f
+#define OPRND(f) par_exec->operands.fmt_58_st_plus.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_17_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_17_CMP_CODE
+ EXTRACT_FMT_58_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_58_ST_PLUS_CODE
do {
CPU (h_gr[f_r2]) = ADDSI (OPRND (src2), 4);
if (PROFILE_MODEL_P (current_cpu))
{
m32rx_model_mark_get_h_gr (current_cpu, abuf);
+ m32rx_model_mark_set_h_gr (current_cpu, abuf);
m32rx_model_profile_insn (current_cpu, abuf);
}
#endif
SEM_FN_NAME (m32rx,st_minus) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_17_cmp.f
+#define OPRND(f) par_exec->operands.fmt_58_st_plus.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_17_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_17_CMP_CODE
+ EXTRACT_FMT_58_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_58_ST_PLUS_CODE
do {
CPU (h_gr[f_r2]) = SUBSI (OPRND (src2), 4);
if (PROFILE_MODEL_P (current_cpu))
{
m32rx_model_mark_get_h_gr (current_cpu, abuf);
+ m32rx_model_mark_set_h_gr (current_cpu, abuf);
m32rx_model_profile_insn (current_cpu, abuf);
}
#endif
SEM_FN_NAME (m32rx,subv) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_0_add.f
+#define OPRND(f) par_exec->operands.fmt_5_addv.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_0_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_0_ADD_CODE
+ EXTRACT_FMT_5_ADDV_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_5_ADDV_CODE
do {
BI temp1;SI temp0;
SEM_FN_NAME (m32rx,subx) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_6_addx.f
+#define OPRND(f) par_exec->operands.fmt_7_addx.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_6_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_6_ADDX_CODE
+ EXTRACT_FMT_7_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_7_ADDX_CODE
do {
BI temp1;SI temp0;
SEM_FN_NAME (m32rx,trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_49_trap.f
+#define OPRND(f) par_exec->operands.fmt_59_trap.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
int taken_p = 0;
- EXTRACT_FMT_49_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */
- EXTRACT_FMT_49_TRAP_CODE
+ EXTRACT_FMT_59_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */
+ EXTRACT_FMT_59_TRAP_CODE
do_trap (current_cpu, OPRND (uimm4));
SEM_FN_NAME (m32rx,unlock) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_17_cmp.f
+#define OPRND(f) par_exec->operands.fmt_60_unlock.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_17_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_17_CMP_CODE
+ EXTRACT_FMT_60_UNLOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_60_UNLOCK_CODE
do_unlock (current_cpu, OPRND (src1), OPRND (src2));
#undef OPRND
}
-/* Perform satb: satb $dr,$src2. */
+/* Perform satb: satb $dr,$sr. */
CIA
SEM_FN_NAME (m32rx,satb) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_50_satb.f
+#define OPRND(f) par_exec->operands.fmt_61_satb.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
- EXTRACT_FMT_50_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_50_SATB_CODE
+ EXTRACT_FMT_61_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
+ EXTRACT_FMT_61_SATB_CODE
- CPU (h_gr[f_r1]) = (GESI (OPRND (src2), 127)) ? (127) : (LESI (OPRND (src2), -128)) ? (-128) : (OPRND (src2));
+ CPU (h_gr[f_r1]) = (GESI (OPRND (sr), 127)) ? (127) : (LESI (OPRND (sr), -128)) ? (-128) : (OPRND (sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
#if WITH_PROFILE_MODEL_P
#undef OPRND
}
-/* Perform sath: sath $dr,$src2. */
+/* Perform sath: sath $dr,$sr. */
CIA
SEM_FN_NAME (m32rx,sath) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_50_satb.f
+#define OPRND(f) par_exec->operands.fmt_61_satb.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
- EXTRACT_FMT_50_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_50_SATB_CODE
+ EXTRACT_FMT_61_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
+ EXTRACT_FMT_61_SATB_CODE
- CPU (h_gr[f_r1]) = (GESI (OPRND (src2), 32767)) ? (32767) : (LESI (OPRND (src2), -32768)) ? (-32768) : (OPRND (src2));
+ CPU (h_gr[f_r1]) = (GESI (OPRND (sr), 32767)) ? (32767) : (LESI (OPRND (sr), -32768)) ? (-32768) : (OPRND (sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
#if WITH_PROFILE_MODEL_P
#undef OPRND
}
-/* Perform sat: sat $dr,$src2. */
+/* Perform sat: sat $dr,$sr. */
CIA
SEM_FN_NAME (m32rx,sat) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_51_sat.f
+#define OPRND(f) par_exec->operands.fmt_62_sat.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 4;
- EXTRACT_FMT_51_SAT_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_51_SAT_CODE
+ EXTRACT_FMT_62_SAT_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
+ EXTRACT_FMT_62_SAT_CODE
- CPU (h_gr[f_r1]) = (OPRND (condbit)) ? ((LTSI (OPRND (src2), 0)) ? (2147483647) : (0x80000000)) : (OPRND (src2));
+ CPU (h_gr[f_r1]) = (OPRND (condbit)) ? ((LTSI (OPRND (sr), 0)) ? (2147483647) : (0x80000000)) : (OPRND (sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
#if WITH_PROFILE_MODEL_P
SEM_FN_NAME (m32rx,pcmpbz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_20_cmpz.f
+#define OPRND(f) par_exec->operands.fmt_21_cmpz.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_20_CMPZ_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_20_CMPZ_CODE
+ EXTRACT_FMT_21_CMPZ_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_21_CMPZ_CODE
CPU (h_cond) = (EQSI (ANDSI (OPRND (src2), 255), 0)) ? (1) : (EQSI (ANDSI (OPRND (src2), 65280), 0)) ? (1) : (EQSI (ANDSI (OPRND (src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (OPRND (src2), 0xff000000), 0)) ? (1) : (0);
TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
SEM_FN_NAME (m32rx,sadd) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_52_sadd.f
+#define OPRND(f) par_exec->operands.fmt_63_sadd.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_52_SADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_52_SADD_CODE
+ EXTRACT_FMT_63_SADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_63_SADD_CODE
m32rx_h_accums_set (current_cpu, 0, ADDDI (SRADI (OPRND (h_accums_1), 16), OPRND (h_accums_0)));
TRACE_RESULT (current_cpu, "h-accums-0", 'D', m32rx_h_accums_get (current_cpu, 0));
SEM_FN_NAME (m32rx,macwu1) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_53_macwu1.f
+#define OPRND(f) par_exec->operands.fmt_64_macwu1.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_53_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_53_MACWU1_CODE
+ EXTRACT_FMT_64_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_64_MACWU1_CODE
m32rx_h_accums_set (current_cpu, 1, SRADI (SLLDI (ADDDI (OPRND (h_accums_1), MULDI (EXTSIDI (OPRND (src1)), EXTSIDI (ANDSI (OPRND (src2), 65535)))), 8), 8));
TRACE_RESULT (current_cpu, "h-accums-1", 'D', m32rx_h_accums_get (current_cpu, 1));
SEM_FN_NAME (m32rx,msblo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_54_msblo.f
+#define OPRND(f) par_exec->operands.fmt_65_msblo.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_54_MSBLO_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_54_MSBLO_CODE
+ EXTRACT_FMT_65_MSBLO_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_65_MSBLO_CODE
CPU (h_accum) = SRADI (SLLDI (SUBDI (OPRND (accum), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (OPRND (src1))), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 32), 16)), 8), 8);
TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
SEM_FN_NAME (m32rx,mulwu1) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_17_cmp.f
+#define OPRND(f) par_exec->operands.fmt_66_mulwu1.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_17_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_17_CMP_CODE
+ EXTRACT_FMT_66_MULWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_66_MULWU1_CODE
m32rx_h_accums_set (current_cpu, 1, SRADI (SLLDI (MULDI (EXTSIDI (OPRND (src1)), EXTSIDI (ANDSI (OPRND (src2), 65535))), 16), 16));
TRACE_RESULT (current_cpu, "h-accums-1", 'D', m32rx_h_accums_get (current_cpu, 1));
SEM_FN_NAME (m32rx,maclh1) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_53_macwu1.f
+#define OPRND(f) par_exec->operands.fmt_64_macwu1.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_53_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_53_MACWU1_CODE
+ EXTRACT_FMT_64_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_64_MACWU1_CODE
m32rx_h_accums_set (current_cpu, 1, SRADI (SLLDI (ADDDI (OPRND (h_accums_1), SRADI (SLLDI (MULDI (EXTSIDI (SRASI (OPRND (src1), 16)), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 32), 16)), 8), 8));
TRACE_RESULT (current_cpu, "h-accums-1", 'D', m32rx_h_accums_get (current_cpu, 1));
SEM_FN_NAME (m32rx,sc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_55_sc.f
+#define OPRND(f) par_exec->operands.fmt_67_sc.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_55_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_55_SC_CODE
+ EXTRACT_FMT_67_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_67_SC_CODE
if (OPRND (condbit)) {
CPU (h_abort) = 1;
SEM_FN_NAME (m32rx,snc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_55_sc.f
+#define OPRND(f) par_exec->operands.fmt_67_sc.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = CPU (h_pc) + 2;
- EXTRACT_FMT_55_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_55_SC_CODE
+ EXTRACT_FMT_67_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_67_SC_CODE
if (NOTBI (OPRND (condbit))) {
CPU (h_abort) = 1;
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