i386.md (operations with memory inputs setting flags peephole2): Remove uneeded REG_P...
authorUros Bizjak <uros@gcc.gnu.org>
Fri, 29 Apr 2016 14:31:56 +0000 (16:31 +0200)
committerUros Bizjak <uros@gcc.gnu.org>
Fri, 29 Apr 2016 14:31:56 +0000 (16:31 +0200)
* config/i386/i386.md
(operations with memory inputs setting flags peephole2):
Remove uneeded REG_P checks.  Cleanup pattern generation.

From-SVN: r235641

gcc/ChangeLog
gcc/config/i386/i386.md

index 454b8aff27d1d1c0e616dd5434f42a0a2fa8664f..86523e00fea249d759ce40635a15c6ab29967d10 100644 (file)
@@ -1,3 +1,9 @@
+2016-04-29  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/i386.md
+       (operations with memory inputs setting flags peephole2):
+       Remove uneeded REG_P checks.  Cleanup pattern generation.
+
 2016-04-29  Ilya Enkovich  <ilya.enkovich@intel.com>
 
        * tree-vect-loop.c (vect_transform_loop): Fix
@@ -12,9 +18,8 @@
 
 2016-04-29  Andrew Burgess  <andrew.burgess@embecosm.com>
 
-       * config/arc/arc.md (*loadqi_update): Replace use of 'rI'
-       constraint with 'rCm2' constraints to limit possible immediate
-       size.
+       * config/arc/arc.md (*loadqi_update): Replace use of 'rI' constraint
+       with 'rCm2' constraints to limit possible immediate size.
        (*load_zeroextendqisi_update): Likewise.
        (*load_signextendqisi_update): Likewise.
        (*loadhi_update): Likewise.
index aef6369f28e099579aecb41cf853138dc2a5319c..217551b1dc984c25ce499b8a8b42555d6ec1e643 100644 (file)
                         (GET_CODE (operands[3]) == PLUS
                          || GET_CODE (operands[3]) == MINUS)
                         ? CCGOCmode : CCNOmode)"
-  [(parallel [(set (match_dup 4) (match_dup 5))
-             (set (match_dup 1) (match_op_dup 3 [(match_dup 1)
-                                                 (match_dup 2)]))])]
+  [(parallel [(set (match_dup 4) (match_dup 6))
+             (set (match_dup 1) (match_dup 5))])]
 {
   operands[4] = SET_DEST (PATTERN (peep2_next_insn (3)));
-  operands[5] = gen_rtx_fmt_ee (GET_CODE (operands[3]), <MODE>mode,
-                               copy_rtx (operands[1]),
-                               copy_rtx (operands[2]));
-  operands[5] = gen_rtx_COMPARE (GET_MODE (operands[4]),
-                                operands[5], const0_rtx);
+  operands[5]
+    = gen_rtx_fmt_ee (GET_CODE (operands[3]), GET_MODE (operands[3]),
+                     copy_rtx (operands[1]),
+                     operands[2]);
+  operands[6]
+    = gen_rtx_COMPARE (GET_MODE (operands[4]),
+                      copy_rtx (operands[5]),
+                      const0_rtx);
 })
 
 ;; Likewise for instances where we have a lea pattern.
        || immediate_operand (operands[2], QImode)
        || any_QIreg_operand (operands[2], QImode))
    && ix86_match_ccmode (peep2_next_insn (3), CCGOCmode)"
-  [(parallel [(set (match_dup 4) (match_dup 5))
-             (set (match_dup 1) (plus:SWI (match_dup 1)
-                                          (match_dup 2)))])]
+  [(parallel [(set (match_dup 4) (match_dup 6))
+             (set (match_dup 1) (match_dup 5))])]
 {
   operands[4] = SET_DEST (PATTERN (peep2_next_insn (3)));
-  operands[5] = gen_rtx_PLUS (<MODE>mode,
-                             copy_rtx (operands[1]),
-                             copy_rtx (operands[2]));
-  operands[5] = gen_rtx_COMPARE (GET_MODE (operands[4]),
-                                operands[5], const0_rtx);
+  operands[5]
+    = gen_rtx_PLUS (<MODE>mode,
+                   copy_rtx (operands[1]),
+                   operands[2]);
+  operands[6]
+    = gen_rtx_COMPARE (GET_MODE (operands[4]),
+                      copy_rtx (operands[5]),
+                      const0_rtx);
 })
 
 (define_peephole2
    && ix86_match_ccmode (peep2_next_insn (2),
                         GET_CODE (operands[2]) == PLUS
                         ? CCGOCmode : CCNOmode)"
-  [(parallel [(set (match_dup 3) (match_dup 4))
-             (set (match_dup 1) (match_op_dup 2 [(match_dup 1)
-                                                 (match_dup 0)]))])]
+  [(parallel [(set (match_dup 3) (match_dup 5))
+             (set (match_dup 1) (match_dup 4))])]
 {
   operands[3] = SET_DEST (PATTERN (peep2_next_insn (2)));
-  operands[4] = gen_rtx_fmt_ee (GET_CODE (operands[2]), <MODE>mode,
-                               copy_rtx (operands[1]),
-                               copy_rtx (operands[0]));
-  operands[4] = gen_rtx_COMPARE (GET_MODE (operands[3]),
-                                operands[4], const0_rtx);
+  operands[4]
+    = gen_rtx_fmt_ee (GET_CODE (operands[2]), GET_MODE (operands[2]),
+                     copy_rtx (operands[1]),
+                     operands[0]);
+  operands[5]
+    = gen_rtx_COMPARE (GET_MODE (operands[3]),
+                      copy_rtx (operands[4]),
+                      const0_rtx);
 })
 
 (define_peephole2
    (set (match_dup 1) (match_dup 0))
    (set (reg FLAGS_REG) (compare (match_dup 0) (const_int 0)))]
   "(TARGET_READ_MODIFY_WRITE || optimize_insn_for_size_p ())
-   && REG_P (operands[0]) && REG_P (operands[4])
    && REGNO (operands[0]) == REGNO (operands[4])
    && peep2_reg_dead_p (4, operands[0])
    && (<MODE>mode != QImode
                         (GET_CODE (operands[3]) == PLUS
                          || GET_CODE (operands[3]) == MINUS)
                         ? CCGOCmode : CCNOmode)"
-  [(parallel [(set (match_dup 4) (match_dup 5))
-             (set (match_dup 1) (match_dup 6))])]
+  [(parallel [(set (match_dup 4) (match_dup 6))
+             (set (match_dup 1) (match_dup 5))])]
 {
-  operands[2] = gen_lowpart (<MODE>mode, operands[2]);
   operands[4] = SET_DEST (PATTERN (peep2_next_insn (3)));
-  operands[5] = gen_rtx_fmt_ee (GET_CODE (operands[3]), <MODE>mode,
-                               copy_rtx (operands[1]), operands[2]);
-  operands[5] = gen_rtx_COMPARE (GET_MODE (operands[4]),
-                                operands[5], const0_rtx);
-  operands[6] = gen_rtx_fmt_ee (GET_CODE (operands[3]), <MODE>mode,
-                               copy_rtx (operands[1]),
-                               copy_rtx (operands[2]));
+  operands[5]
+    = gen_rtx_fmt_ee (GET_CODE (operands[3]), <MODE>mode,
+                     copy_rtx (operands[1]),
+                     gen_lowpart (<MODE>mode, operands[2]));
+  operands[6]
+    = gen_rtx_COMPARE (GET_MODE (operands[4]),
+                      copy_rtx (operands[5]),
+                      const0_rtx);
 })
 
 ;; Attempt to always use XOR for zeroing registers (including FP modes).