Clean up

diff --git a/migScope/tools/vcd.py b/migScope/tools/vcd.py
index a4d00f4fcbe8ab38edc76ebebe422bf572fa9343..d7b1246f758f038ba9229d79287642c1ec56d447 100644 (file)
--- a/migScope/tools/vcd.py
+++ b/migScope/tools/vcd.py
@@ -1,5 +1,7 @@
+import sys
 import datetime
 
+sys.path.append("../../")
 from migScope.tools.conv import *
 
 class Var:
@@ -161,7 +163,7 @@ def main():
        myvcd.add(Var("wire",3,"foo3"))
        myvcd.add(Var("wire",4,"foo4"))
        ramp = [i%128 for i in range(1024)]
-       myvcd.add(Var("wire",16,"sinus",ramp))
+       myvcd.add(Var("wire",16,"ramp",ramp))
        print(myvcd)
        
 if __name__ == '__main__':

diff --git a/sim/tb_Migscope.py b/sim/tb_Migscope.py
index 1d6933563480a57c1de0190ff22fa65aaf3f7065..8cf51345a1b449d3a2c7bea0e316b779b48197a2 100644 (file)
--- a/sim/tb_Migscope.py
+++ b/sim/tb_Migscope.py
@@ -9,7 +9,6 @@ import sys
 sys.path.append("../")
 
 from migScope import trigger, recorder
-
 from migScope.tools.truthtable import *
 from migScope.tools.vcd import *
 
@@ -76,11 +75,14 @@ def csr_transactions(trigger0, recorder0):
        #Arm
        yield TWrite(recorder0.address + 1,  1)
 
-
+       # Wait Record to be done
+       ##############################
        global rec_done
        while not rec_done:
                yield None
 
+       # Read recorded data
+       ##############################
        global dat_rdy  
        for t in range(64):
                yield TWrite(recorder0.address + 7, 1)