added english language description for lhaup instruction in the pifixedload.mdwm

diff --git a/openpower/isa/pifixedload.mdwn b/openpower/isa/pifixedload.mdwn
index bb8d37df1eefda8de85b6d70a759e41f77199b13..5d4df69ae9aa4725e4a57b4af61094078a342f8a 100644 (file)
--- a/openpower/isa/pifixedload.mdwn
+++ b/openpower/isa/pifixedload.mdwn
@@ -130,6 +130,10 @@ Description:
     The halfword in storage addressed by EA is loaded into RT[48:63].
     RT[0:47] are filled with a copy of bit 0 of the loaded halfword.
 
+    The sum (RA) + D is placed into register RA.
+
+    If RA=0 or RA=RT, the instruction form is invalid.
+
 Special Registers Altered:
 
     None
@@ -152,6 +156,8 @@ Description:
     The halfword in storage addressed by EA is loaded into RT[48:63].
     RT[0:47] are filled with a copy of bit 0 of the loaded halfword.
 
+    The sum (RA) + (RB) is placed into register RA.
+
 Special Registers Altered:
 
     None