i965/vec4/gen6: fix exec_size for instructions with destination width of 4

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index 871b49ad9ab14f7c37c76fe5d79c27a4628df4aa..7063426b48a5f8dd9f5c22f6139207932b0722c6 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -1434,6 +1434,7 @@ generate_code(struct brw_codegen *p,
       assert(inst->mlen <= BRW_MAX_MSG_LENGTH);
 
       unsigned pre_emit_nr_insn = p->nr_insn;
+      bool fix_exec_size = false;
 
       if (dst.width == BRW_WIDTH_4) {
          /* This happens in attribute fixups for "dual instanced" geometry
@@ -1458,6 +1459,8 @@ generate_code(struct brw_codegen *p,
             if (src[i].file == BRW_GENERAL_REGISTER_FILE)
                src[i] = stride(src[i], 4, 4, 1);
          }
+         brw_set_default_exec_size(p, BRW_EXECUTE_4);
+         fix_exec_size = true;
       }
 
       switch (inst->opcode) {
@@ -1946,6 +1949,9 @@ generate_code(struct brw_codegen *p,
          unreachable("Unsupported opcode");
       }
 
+      if (fix_exec_size)
+         brw_set_default_exec_size(p, BRW_EXECUTE_8);
+
       if (inst->opcode == VEC4_OPCODE_PACK_BYTES) {
          /* Handled dependency hints in the generator. */