+2000-11-26 Stephane Carrez <Stephane.Carrez@worldnet.fr>
+
+ * dv-m68hc11.c (m68hc11cpu_io_read_buffer): Use attach_size
+ instead of a hard-coded value.
+ (m68hc11cpu_io_write_buffer): Likewise.
+ (dv_m68hc11_descriptor): Define a 68hc12 device.
+ * dv-m68hc11eepr.c (dv_m68hc11eepr_descriptor): Likewise.
+ * dv-m68hc11tim.c (dv_m68hc11tim_descriptor): Likewise.
+ * dv-m68hc11spi.c (dv_m68hc11spi_descriptor): Likewise.
+ * dv-m68hc11sio.c (dv_m68hc11sio_descriptor): Likewise.
+
2000-11-22 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* dv-m68hc11.c (attach_m68hc11_regs): Register a delete handler.
-/* dv-m68hc11.c -- CPU 68HC11 as a device.
+/* dv-m68hc11.c -- CPU 68HC11&68HC12 as a device.
Copyright (C) 1999, 2000 Free Software Foundation, Inc.
Written by Stephane Carrez (stcarrez@worldnet.fr)
(From a driver model Contributed by Cygnus Solutions.)
/* DEVICE
m68hc11cpu - m68hc11 cpu virtual device
-
+ m68hc12cpu - m68hc12 cpu virtual device
DESCRIPTION
- Implements the external m68hc11 functionality. This includes the
- delivery of of interrupts generated from other devices and the
+ Implements the external m68hc11/68hc12 functionality. This includes
+ the delivery of of interrupts generated from other devices and the
handling of device specific registers.
reg <base> <size>
- Register base (should be 0x1000 0x03f).
+ Register base (should be 0x1000 0x03f for C11, 0x0000 0x3ff for HC12).
clock <hz>
attach_m68hc11_regs (me, controller);
}
-
-
/* An event arrives on an interrupt port. */
static void
while (nr_bytes)
{
- if (base >= 0x3F)
+ if (base >= controller->attach_size)
break;
memcpy (dest, &cpu->ios[base], 1);
while (nr_bytes)
{
uint8 val;
- if (base >= 0x3F)
+ if (base >= controller->attach_size)
break;
val = *((uint8*) source);
}
const struct hw_descriptor dv_m68hc11_descriptor[] = {
- { "m68hc11", m68hc11cpu_finish, },
+ { "m68hc11", m68hc11cpu_finish },
+ { "m68hc12", m68hc11cpu_finish },
{ NULL },
};
}
const struct hw_descriptor dv_m68hc11eepr_descriptor[] = {
- { "m68hc11eepr", m68hc11eepr_finish, },
+ { "m68hc11eepr", m68hc11eepr_finish },
+ { "m68hc12eepr", m68hc11eepr_finish },
{ NULL },
};
const struct hw_descriptor dv_m68hc11sio_descriptor[] = {
- { "m68hc11sio", m68hc11sio_finish, },
+ { "m68hc11sio", m68hc11sio_finish },
+ { "m68hc12sio", m68hc11sio_finish },
{ NULL },
};
const struct hw_descriptor dv_m68hc11spi_descriptor[] = {
- { "m68hc11spi", m68hc11spi_finish, },
+ { "m68hc11spi", m68hc11spi_finish },
+ { "m68hc12spi", m68hc11spi_finish },
{ NULL },
};
me);
}
-
static void
m68hc11tim_finish (struct hw *me)
{
#else
me->to_ioctl = m68hc11tim_ioctl;
#endif
-
+
/* Preset defaults. */
controller->clock_prescaler = 1;
controller->tcnt_adjust = 0;
const struct hw_descriptor dv_m68hc11tim_descriptor[] = {
- { "m68hc11tim", m68hc11tim_finish, },
+ { "m68hc11tim", m68hc11tim_finish },
+ { "m68hc12tim", m68hc11tim_finish },
{ NULL },
};