+2018-06-20 Renlin Li <renlin.li@arm.com>
+
+ * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use PG_OFFSET
+ to resolve BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
+ BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
+ BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
+ BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC,
+ BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC,
+ BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC,
+ BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC,
+ BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC.
+
2018-06-20 Nick Clifton <nickc@redhat.com>
PR 23299
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12:
- case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12:
- case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12:
- case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
- case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12:
- case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12:
- case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12:
- case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12:
- case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
value = value + addend;
break;
case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
value = PG_OFFSET (value + addend);
break;
+2018-06-20 Renlin Li <renlin.li@arm.com>
+
+ * testsuite/ld-aarch64/emit-relocs-115.d: Update test with new value.
+ * testsuite/ld-aarch64/emit-relocs-534.d: Likewise.
+ * testsuite/ld-aarch64/emit-relocs-555.d: Likewise.
+
2018-06-19 Maciej W. Rozycki <macro@mips.com>
PR ld/22966
00010000 <.text>:
10000: 798019d6 ldrsh x22, \[x14, #12\]
10000: R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC v2
- 10004: 79a72a28 ldrsh x8, \[x17, #5012\]
+ 10004: 79872a28 ldrsh x8, \[x17, #916\]
10004: R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC v3
0000000000010000 <.text>:
10000: 798009d6 ldrsh x22, \[x14, #4\]
10000: R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC v2
- 10004: 79a71a28 ldrsh x8, \[x17, #5004\]
+ 10004: 79871a28 ldrsh x8, \[x17, #908\]
10004: R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC v3
0000000000010000 <.text>:
10000: 798029d6 ldrsh x22, \[x14, #20\]
10000: R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC v2
- 10004: 79a73a28 ldrsh x8, \[x17, #5020\]
+ 10004: 79873a28 ldrsh x8, \[x17, #924\]
10004: R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC v3