-frerun-cse-after-loop -frerun-loop-opt @gol
-fschedule-insns -fschedule-insns2 @gol
-fno-sched-interblock -fno-sched-spec -fsched-spec-load @gol
--fsched-spec-load-dangerous -fsignaling-nans @gol
+-fsched-spec-load-dangerous -fsched2-use-superblocks @gol
+-fsched2-use-traces -fsignaling-nans @gol
-fsingle-precision-constant -fssa -fssa-ccp -fssa-dce @gol
-fstrength-reduce -fstrict-aliasing -ftracer -fthread-jumps @gol
-funit-at-a-time -funroll-all-loops -funroll-loops -funswitch-loops @gol
sense when scheduling before register allocation, i.e.@: with
@option{-fschedule-insns} or at @option{-O2} or higher.
+@item -fsched2-use-superblocks
+@opindex fsched2-use-superblocks
+When schedulilng after register allocation, do use superblock scheduling
+algorithm. Superblock scheduling allows motion acress basic block boundaries
+resulting on faster schedules. This option is experimental, as not all machine
+descriptions used by GCC model the CPU closely enought to avoid unreliable
+results from the algorithm.
+
+This only makes sense when scheduling after register allocation, i.e.@: with
+@option{-fschedule-insns2} or at @option{-O2} or higher.
+
+@item -fsched2-use-traces
+@opindex fsched2-use-traces
+Use @option{-fsched2-use-superblocks} algorithm when scheduling after register
+allocation and additionally perform code duplication in order to increase the
+size of superblocks using tracer pass. See @option{-ftracer} for details on
+trace formation.
+
+This mode should produce faster but singificantly longer programs. Also
+without @code{-fbranch-probabilities} the traces constructed may not match the
+reality and hurt the performance. This only makes
+sense when scheduling after register allocation, i.e.@: with
+@option{-fschedule-insns2} or at @option{-O2} or higher.
+
@item -fcaller-saves
@opindex fcaller-saves
Enable values to be allocated in registers that will be clobbered by
DFI_peephole2,
DFI_rnreg,
DFI_ce3,
+ DFI_bbro,
DFI_sched2,
DFI_stack,
- DFI_bbro,
DFI_mach,
DFI_dbr,
DFI_MAX
{ "peephole2", 'z', 1, 0, 0 },
{ "rnreg", 'n', 1, 0, 0 },
{ "ce3", 'E', 1, 0, 0 },
+ { "bbro", 'B', 1, 0, 0 },
{ "sched2", 'R', 1, 0, 0 },
{ "stack", 'k', 1, 0, 0 },
- { "bbro", 'B', 1, 0, 0 },
{ "mach", 'M', 1, 0, 0 },
{ "dbr", 'd', 0, 0, 0 },
};
int flag_schedule_insns = 0;
int flag_schedule_insns_after_reload = 0;
+/* When flag_schedule_insns_after_reload is set, use EBB scheduler. */
+int flag_sched2_use_superblocks = 0;
+
+/* When flag_schedule_insns_after_reload is set, construct traces and EBB
+ scheduler. */
+int flag_sched2_use_traces = 0;
+
/* The following flags have effect only for scheduling before register
allocation:
N_("Allow speculative motion of some loads") },
{"sched-spec-load-dangerous",&flag_schedule_speculative_load_dangerous, 1,
N_("Allow speculative motion of more loads") },
+ {"sched2-use-superblocks", &flag_sched2_use_superblocks, 1,
+ N_("If scheduling post reload, do superblock sheduling") },
+ {"sched2-use-traces", &flag_sched2_use_traces, 1,
+ N_("If scheduling post reload, do trace sheduling") },
{"branch-count-reg",&flag_branch_on_count_reg, 1,
N_("Replace add,compare,branch with branch on count reg") },
{"pic", &flag_pic, 1,
split_all_insns (1);
#endif
+ if (optimize > 0)
+ {
+ timevar_push (TV_REORDER_BLOCKS);
+ open_dump_file (DFI_bbro, decl);
+
+ /* Last attempt to optimize CFG, as scheduling, peepholing and insn
+ splitting possibly introduced more crossjumping opportunities. */
+ cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_UPDATE_LIFE
+ | (flag_crossjumping ? CLEANUP_CROSSJUMP : 0));
+
+ if (flag_sched2_use_traces && flag_schedule_insns_after_reload)
+ tracer ();
+ if (flag_reorder_blocks)
+ reorder_basic_blocks ();
+ if (flag_reorder_blocks
+ || (flag_sched2_use_traces && flag_schedule_insns_after_reload))
+ cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_UPDATE_LIFE);
+
+ close_dump_file (DFI_bbro, print_rtl_with_bb, insns);
+ timevar_pop (TV_REORDER_BLOCKS);
+ }
+
#ifdef INSN_SCHEDULING
if (optimize > 0 && flag_schedule_insns_after_reload)
{
split_all_insns (1);
- schedule_insns (rtl_dump_file);
+ if (flag_sched2_use_superblocks || flag_sched2_use_traces)
+ {
+ schedule_ebbs (rtl_dump_file);
+ /* No liveness updating code yet, but it should be easy to do.
+ reg-stack recompute the liveness when needed for now. */
+ count_or_remove_death_notes (NULL, 1);
+ cleanup_cfg (CLEANUP_EXPENSIVE);
+ }
+ else
+ schedule_insns (rtl_dump_file);
close_dump_file (DFI_sched2, print_rtl_with_bb, insns);
timevar_pop (TV_SCHED2);
timevar_push (TV_REG_STACK);
open_dump_file (DFI_stack, decl);
- reg_to_stack (insns, rtl_dump_file);
+ if (reg_to_stack (insns, rtl_dump_file) && optimize)
+ {
+ if (cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_POST_REGSTACK
+ | (flag_crossjumping ? CLEANUP_CROSSJUMP : 0))
+ && flag_reorder_blocks)
+ {
+ reorder_basic_blocks ();
+ cleanup_cfg (CLEANUP_EXPENSIVE);
+ }
+ }
close_dump_file (DFI_stack, print_rtl_with_bb, insns);
timevar_pop (TV_REG_STACK);
flag_cse_skip_blocks = 1;
flag_gcse = 1;
flag_expensive_optimizations = 1;
+ flag_unit_at_a_time = 1;
flag_strength_reduce = 1;
flag_rerun_cse_after_loop = 1;
flag_rerun_loop_opt = 1;