sim_lr = sim.spr['LR'].value
print("qemu pc", hex(qpc))
print("qemu cr", hex(qcr))
- print("qemu lr", bin(qlr))
+ print("qemu lr", hex(qlr))
print("qemu xer", bin(qxer))
print("sim nia", hex(sim.pc.NIA.value))
print("sim pc", hex(sim.pc.CIA.value))
# delete the previous breakpoint so loops don't screw things up
q.delete_breakpoint()
- # can't do many of these - lr, ctr, etc. etc. later, just LR for now
- if initial_sprs:
- lr = initial_sprs.get('lr', None)
- if lr is None:
- lr = initial_sprs.get('LR', None)
- if lr is not None:
- q.set_lr(lr)
-
# allow run to end
q.break_address(start_addr + program.size())
# or to trap (not ideal)
# or to alternative (absolute) address)
if extra_break_addr is not None:
q.break_address(extra_break_addr)
- if continuous_run:
- q.gdb_continue()
+ # set endian before SPR set
q.set_endian(bigendian)
+
+ # can't do many of these - lr, ctr, etc. etc. later, just LR for now
+ if initial_sprs:
+ lr = initial_sprs.get('lr', None)
+ if lr is None:
+ lr = initial_sprs.get('LR', None)
+ if lr is not None:
+ q.set_lr(lr)
+
+ # disassemble and dump
d = q.disasm(start_addr, start_addr + program.size())
for line in d:
print ("qemu disasm", line)
+
+ # start running
+ if continuous_run:
+ q.gdb_continue()
+
return q