convert minor_19 to bitpattern (for adding addpcis)

diff --git a/openpower/isatables/insndb.csv b/openpower/isatables/insndb.csv
index 229da10d276a5b9067627b8f17931d705121623f..4b71a0741a213797de827bf4c07c75a1bfcd3a75 100644 (file)
--- a/openpower/isatables/insndb.csv
+++ b/openpower/isatables/insndb.csv
@@ -1,5 +1,5 @@
 path,opcode,bitsel,suffix,mode
-minor_19.csv,19,21:30,NONE,integer
+minor_19.csv,19,21:30,NONE,pattern
 minor_30.csv,30,27:30,NONE,pattern
 minor_31.csv,31,21:30,0b101,integer
 minor_58.csv,58,30:31,NONE,integer

diff --git a/openpower/isatables/minor_19.csv b/openpower/isatables/minor_19.csv
index 42f9d91eaef0cee7f5c1523d0e102f319a2ec7f4..66f4c803e1e8f1b453d8c5e41b1b75c14a4fc9c2 100644 (file)
--- a/openpower/isatables/minor_19.csv
+++ b/openpower/isatables/minor_19.csv
@@ -1,18 +1,18 @@
 # SPDX-License-Header: CC-BY-4
 # derived from microwatt decode1.vhdl, with thanks and gratitude (IBM, OPF)
 opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry out,ldst len,BR,sgn ext,upd,rsrv,32b,sgn,rc,lk,sgl pipe,comment,form,CONDITIONS
-0b0000000000,CR,OP_MCRF,NONE,NONE,NONE,NONE,BFA,BF,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,mcrf,XL,
-0b0100000001,CR,OP_CROP,NONE,NONE,NONE,NONE,BA_BB,BT,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,crand,XL,
-0b0010000001,CR,OP_CROP,NONE,NONE,NONE,NONE,BA_BB,BT,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,crandc,XL,
-0b0100100001,CR,OP_CROP,NONE,NONE,NONE,NONE,BA_BB,BT,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,creqv,XL,
-0b0011100001,CR,OP_CROP,NONE,NONE,NONE,NONE,BA_BB,BT,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,crnand,XL,
-0b0000100001,CR,OP_CROP,NONE,NONE,NONE,NONE,BA_BB,BT,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,crnor,XL,
-0b0111000001,CR,OP_CROP,NONE,NONE,NONE,NONE,BA_BB,BT,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,cror,XL,
-0b0110100001,CR,OP_CROP,NONE,NONE,NONE,NONE,BA_BB,BT,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,crorc,XL,
-0b0011000001,CR,OP_CROP,NONE,NONE,NONE,NONE,BA_BB,BT,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,crxor,XL,
-0b1000010000,BRANCH,OP_BCREG,SPR,SPR,NONE,SPR,BI,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,1,0,bcctr,XL,
-0b0000010000,BRANCH,OP_BCREG,SPR,SPR,NONE,SPR,BI,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,1,0,bclr,XL,
-0b1000110000,BRANCH,OP_BCREG,SPR,SPR,NONE,SPR,BI,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,1,0,bctar,XL,
-0b0010010110,ALU,OP_ISYNC,NONE,NONE,NONE,NONE,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,1,isync,XL,
-0b0000010010,TRAP,OP_RFID,SPR,SPR,NONE,NONE,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,rfid,XL,
-0b0100010010,TRAP,OP_RFID,SPR,SPR,NONE,NONE,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,hrfid,XL,
+0000000000,CR,OP_MCRF,NONE,NONE,NONE,NONE,BFA,BF,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,mcrf,XL,
+0100000001,CR,OP_CROP,NONE,NONE,NONE,NONE,BA_BB,BT,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,crand,XL,
+0010000001,CR,OP_CROP,NONE,NONE,NONE,NONE,BA_BB,BT,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,crandc,XL,
+0100100001,CR,OP_CROP,NONE,NONE,NONE,NONE,BA_BB,BT,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,creqv,XL,
+0011100001,CR,OP_CROP,NONE,NONE,NONE,NONE,BA_BB,BT,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,crnand,XL,
+0000100001,CR,OP_CROP,NONE,NONE,NONE,NONE,BA_BB,BT,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,crnor,XL,
+0111000001,CR,OP_CROP,NONE,NONE,NONE,NONE,BA_BB,BT,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,cror,XL,
+0110100001,CR,OP_CROP,NONE,NONE,NONE,NONE,BA_BB,BT,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,crorc,XL,
+0011000001,CR,OP_CROP,NONE,NONE,NONE,NONE,BA_BB,BT,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,crxor,XL,
+1000010000,BRANCH,OP_BCREG,SPR,SPR,NONE,SPR,BI,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,1,0,bcctr,XL,
+0000010000,BRANCH,OP_BCREG,SPR,SPR,NONE,SPR,BI,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,1,0,bclr,XL,
+1000110000,BRANCH,OP_BCREG,SPR,SPR,NONE,SPR,BI,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,1,0,bctar,XL,
+0010010110,ALU,OP_ISYNC,NONE,NONE,NONE,NONE,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,1,isync,XL,
+0000010010,TRAP,OP_RFID,SPR,SPR,NONE,NONE,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,rfid,XL,
+0100010010,TRAP,OP_RFID,SPR,SPR,NONE,NONE,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,hrfid,XL,

diff --git a/src/openpower/decoder/power_decoder.py b/src/openpower/decoder/power_decoder.py
index 5ef452c6004ac48d8ab24b44ba4d67b5eb49ae92..d0e6370c03dc78351d7bd06ff3d94988b479d066 100644 (file)
--- a/src/openpower/decoder/power_decoder.py
+++ b/src/openpower/decoder/power_decoder.py
@@ -717,7 +717,7 @@ def create_pdecode(name=None, col_subset=None, row_subset=None,
     # minor 19 has extra patterns
     m19 = []
     m19.append(Subdecoder(pattern=19, opcodes=get_csv("minor_19.csv"),
-                          opint=True, bitsel=(1, 11), suffix=None,
+                          opint=False, bitsel=(1, 11), suffix=None,
                           subdecoders=[]))
     # XXX problem with sub-decoders (can only handle one),
     # sort this another time