gcc/
* config/aarch64/aarch64-simd.md
(l<fcvt_pattern><su_optab><fcvt_target><VDQF:mode>2): Rename to...
(l<fcvt_pattern><su_optab><VDQF:mode><fcvt_target>2): ... This.
From-SVN: r198397
+2013-04-29 James Greenhalgh <james.greenhalgh@arm.com>
+
+ * config/aarch64/aarch64-simd.md
+ (l<fcvt_pattern><su_optab><fcvt_target><VDQF:mode>2): Rename to...
+ (l<fcvt_pattern><su_optab><VDQF:mode><fcvt_target>2): ... This.
+
2013-04-29 James Greenhalgh <james.greenhalgh@arm.com>
* config/aarch64/arm_neon.h (vrndq<a,m,n,p>_f<32, 64>): Rename to...
;; Vector versions of the fcvt standard patterns.
;; Expands to lbtrunc, lround, lceil, lfloor
-(define_expand "l<fcvt_pattern><su_optab><fcvt_target><VDQF:mode>2"
+(define_expand "l<fcvt_pattern><su_optab><VDQF:mode><fcvt_target>2"
[(set (match_operand:<FCVT_TARGET> 0 "register_operand")
(FIXUORS:<FCVT_TARGET> (unspec:<FCVT_TARGET>
[(match_operand:VDQF 1 "register_operand")]