iris: Allow PIPE_CONTROL with Stall at Scoreboard and RT flush
authorKenneth Graunke <kenneth@whitecape.org>
Mon, 8 Oct 2018 20:44:01 +0000 (13:44 -0700)
committerKenneth Graunke <kenneth@whitecape.org>
Thu, 21 Feb 2019 18:26:09 +0000 (10:26 -0800)
It's nonsensical, but not illegal, and mandatory on Icelake

src/gallium/drivers/iris/iris_state.c

index 86aeccd8c81f8a8c1219fcddc94ad0d3f6ad2f51..c443b16749b9e16ef165d38aa2447fb3ced72e70 100644 (file)
@@ -4302,7 +4302,7 @@ iris_emit_raw_pipe_control(struct iris_batch *batch, uint32_t flags,
                                   PIPE_CONTROL_WRITE_TIMESTAMP)));
    }
 
-   if (flags & PIPE_CONTROL_STALL_AT_SCOREBOARD) {
+   if (GEN_GEN < 11 && (flags & PIPE_CONTROL_STALL_AT_SCOREBOARD)) {
       /* From the PIPE_CONTROL instruction table, bit 1:
        *
        *    "This bit is ignored if Depth Stall Enable is set.
@@ -4311,6 +4311,10 @@ iris_emit_raw_pipe_control(struct iris_batch *batch, uint32_t flags,
        *
        * We assert that the caller doesn't do this combination, to try and
        * prevent mistakes.  It shouldn't hurt the GPU, though.
+       *
+       * We skip this check on Gen11+ as the "Stall at Pixel Scoreboard"
+       * and "Render Target Flush" combo is explicitly required for BTI
+       * update workarounds.
        */
       assert(!(flags & (PIPE_CONTROL_DEPTH_STALL |
                         PIPE_CONTROL_RENDER_TARGET_FLUSH)));