pan/midgard: Sketch static analysis to uniform count

This one is a little tricky, but the idea is that:

   r16-r23 are always uniforms

   r8-r15 are sometimes work, sometimes uniforms...
      ...but as work, they are always written before use
      ...and as uniforms, they are never written before use

So we use that heuristic to determine the count to feed the machine.
We'll record work register use in the next commit.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

diff --git a/src/panfrost/midgard/disassemble.c b/src/panfrost/midgard/disassemble.c
index f42e0783b56febd628a4b9186d05de77617e7fb9..7a95878d0f432f2c13e9e0866e1e478cb0c2c22d 100644 (file)
--- a/src/panfrost/midgard/disassemble.c
+++ b/src/panfrost/midgard/disassemble.c
@@ -114,6 +114,12 @@ prefix_for_bits(unsigned bits)
         }
 }
 
+/* For static analysis to ensure all registers are written at least once before
+ * use along the source code path (TODO: does this break done for complex CF?)
+ */
+
+uint16_t midg_ever_written = 0;
+
 static void
 print_reg(unsigned reg, unsigned bits)
 {
@@ -124,6 +130,27 @@ print_reg(unsigned reg, unsigned bits)
                 is_embedded_constant_half = (bits < 32);
         }
 
+        unsigned uniform_reg = 23 - reg;
+        bool is_uniform = false;
+
+        /* For r8-r15, it could be a work or uniform. We distinguish based on
+         * the fact work registers are ALWAYS written before use, but uniform
+         * registers are NEVER written before use. */
+
+        if ((reg >= 8 && reg < 16) && !(midg_ever_written & (1 << reg)))
+                is_uniform = true;
+
+        /* r16-r23 are always uniform */
+
+        if (reg >= 16 && reg <= 23)
+                is_uniform = true;
+
+        /* Update the uniform count appropriately */
+
+        if (is_uniform)
+                midg_stats.uniform_count =
+                        MAX2(uniform_reg + 1, midg_stats.uniform_count);
+
         char prefix = prefix_for_bits(bits);
 
         if (prefix)