arm.h (TARGET_DOTPROD): New.

2017-10-16  Tamar Christina  <tamar.christina@arm.com>

	* config/arm/arm.h (TARGET_DOTPROD): New.
	* config/arm/arm.c (arm_arch_dotprod): New.
	(arm_option_reconfigure_globals): Add arm_arch_dotprod.
	* config/arm/arm-c.c (__ARM_FEATURE_DOTPROD): New.
	* config/arm/arm-cpus.in (armv8.2-a): Enabled +dotprod.
	(feature dotprod, group dotprod, ALL_SIMD_INTERNAL): New.
	(ALL_FPU_INTERNAL): Use ALL_SIMD_INTERNAL.
	* config/arm/t-multilib (v8_2_a_simd_variants): Add dotprod.
	* doc/invoke.texi (armv8.2-a): Document dotprod

From-SVN: r253780

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5bbd24fdac01ccd5e274597d28c305386dd77943..f8ad1dc7c7c4ed16b342fc1d2aaa811594770446 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,15 @@
+2017-10-16  Tamar Christina  <tamar.christina@arm.com>
+
+       * config/arm/arm.h (TARGET_DOTPROD): New.
+       * config/arm/arm.c (arm_arch_dotprod): New.
+       (arm_option_reconfigure_globals): Add arm_arch_dotprod.
+       * config/arm/arm-c.c (__ARM_FEATURE_DOTPROD): New.
+       * config/arm/arm-cpus.in (armv8.2-a): Enabled +dotprod.
+       (feature dotprod, group dotprod, ALL_SIMD_INTERNAL): New.
+       (ALL_FPU_INTERNAL): Use ALL_SIMD_INTERNAL.
+       * config/arm/t-multilib (v8_2_a_simd_variants): Add dotprod.
+       * doc/invoke.texi (armv8.2-a): Document dotprod
+
 2017-10-14  Jan Hubicka  <hubicka@ucw.cz>
 
        * i386.c (ix86_vec_cost): New function.

diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c
index 9178937b6d9e0fe5d0948701390c4cf01f4f8c7d..295f03bf8ee02be7c89ed2967d283be206e9f25a 100644 (file)
--- a/gcc/config/arm/arm-c.c
+++ b/gcc/config/arm/arm-c.c
@@ -72,11 +72,11 @@ arm_cpu_builtins (struct cpp_reader* pfile)
 
   def_or_undef_macro (pfile, "__ARM_FEATURE_QRDMX", TARGET_NEON_RDMA);
 
-  if (TARGET_CRC32)
-    builtin_define ("__ARM_FEATURE_CRC32");
-
+  def_or_undef_macro (pfile, "__ARM_FEATURE_CRC32", TARGET_CRC32);
+  def_or_undef_macro (pfile, "__ARM_FEATURE_DOTPROD", TARGET_DOTPROD);
   def_or_undef_macro (pfile, "__ARM_32BIT_STATE", TARGET_32BIT);
 
+  cpp_undef (pfile, "__ARM_FEATURE_CMSE");
   if (arm_arch8 && !arm_arch_notm)
     {
       if (arm_arch_cmse && use_cmse)

diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in
index 07de4c9375ba7a0df0d8bd00385e54a4042e5264..2da2a7d8e2b63d3d93ca73172b10ff23c1d8d8f9 100644 (file)
--- a/gcc/config/arm/arm-cpus.in
+++ b/gcc/config/arm/arm-cpus.in
@@ -156,6 +156,8 @@ define feature crypto
 # FP16 data processing (half-precision float).
 define feature fp16
 
+# Dot Product instructions extension to ARMv8.2-a.
+define feature dotprod
 
 # ISA Quirks (errata?).  Don't forget to add this to the fgroup
 # ALL_QUIRKS below.
@@ -173,6 +175,17 @@ define feature quirk_cm3_ldrd
 define feature smallmul
 
 # Feature groups.  Conventionally all (or mostly) upper case.
+# ALL_FPU lists all the feature bits associated with the floating-point
+# unit; these will all be removed if the floating-point unit is disabled
+# (eg -mfloat-abi=soft).  ALL_FPU_INTERNAL must ONLY contain features that
+# form part of a named -mfpu option; it is used to map the capabilities
+# back to a named FPU for the benefit of the assembler.
+#
+# ALL_SIMD_INTERNAL and ALL_SIMD are similarly defined to help with the
+# construction of ALL_FPU and ALL_FPU_INTERNAL; they describe the SIMD
+# extensions that are either part of a named FPU or optional extensions
+# respectively.
+
 
 # List of all cryptographic extensions to stripout if crypto is
 # disabled.  Currently, that's trivial, but we define it anyway for
@@ -182,11 +195,12 @@ define fgroup ALL_CRYPTO  crypto
 # List of all SIMD bits to strip out if SIMD is disabled.  This does
 # strip off 32 D-registers, but does not remove support for
 # double-precision FP.
-define fgroup ALL_SIMD fp_d32 neon ALL_CRYPTO
+define fgroup ALL_SIMD_INTERNAL        fp_d32 neon ALL_CRYPTO
+define fgroup ALL_SIMD ALL_SIMD_INTERNAL dotprod
 
 # List of all FPU bits to strip out if -mfpu is used to override the
 # default.  fp16 is deliberately missing from this list.
-define fgroup ALL_FPU_INTERNAL vfpv2 vfpv3 vfpv4 fpv5 fp16conv fp_dbl ALL_SIMD
+define fgroup ALL_FPU_INTERNAL vfpv2 vfpv3 vfpv4 fpv5 fp16conv fp_dbl ALL_SIMD_INTERNAL
 
 # Similarly, but including fp16 and other extensions that aren't part of
 # -mfpu support.
@@ -239,6 +253,7 @@ define fgroup FP_D32        FP_DBL fp_d32
 define fgroup FP_ARMv8 FPv5 FP_D32
 define fgroup NEON     FP_D32 neon
 define fgroup CRYPTO   NEON crypto
+define fgroup DOTPROD  NEON dotprod
 
 # List of all quirk bits to strip out when comparing CPU features with
 # architectures.
@@ -561,6 +576,7 @@ begin arch armv8.2-a
  option crypto add FP_ARMv8 CRYPTO
  option nocrypto remove ALL_CRYPTO
  option nofp remove ALL_FP
+ option dotprod add FP_ARMv8 DOTPROD
 end arch armv8.2-a
 
 begin arch armv8-m.base
@@ -1473,7 +1489,7 @@ begin cpu cortex-a55
  cname cortexa55
  tune for cortex-a53
  tune flags LDSCHED
- architecture armv8.2-a+fp16
+ architecture armv8.2-a+fp16+dotprod
  fpu neon-fp-armv8
  option crypto add FP_ARMv8 CRYPTO
  option nofp remove ALL_FP
@@ -1484,7 +1500,7 @@ begin cpu cortex-a75
  cname cortexa75
  tune for cortex-a57
  tune flags LDSCHED
- architecture armv8.2-a+fp16
+ architecture armv8.2-a+fp16+dotprod
  fpu neon-fp-armv8
  option crypto add FP_ARMv8 CRYPTO
  costs cortex_a73
@@ -1496,7 +1512,7 @@ begin cpu cortex-a75.cortex-a55
  cname cortexa75cortexa55
  tune for cortex-a53
  tune flags LDSCHED
- architecture armv8.2-a+fp16
+ architecture armv8.2-a+fp16+dotprod
  fpu neon-fp-armv8
  option crypto add FP_ARMv8 CRYPTO
  costs cortex_a73

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index c93ad95b1a6a88915d68069ad3bc6c6e5684c528..557c971e80dfbf0321c1c64545eaed6ddf5e8c88 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -971,6 +971,9 @@ int arm_condexec_masklen = 0;
 /* Nonzero if chip supports the ARMv8 CRC instructions.  */
 int arm_arch_crc = 0;
 
+/* Nonzero if chip supports the AdvSIMD Dot Product instructions.  */
+int arm_arch_dotprod = 0;
+
 /* Nonzero if chip supports the ARMv8-M security extensions.  */
 int arm_arch_cmse = 0;
 

diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index a3ca800f7a5cb876368480b97d0641f5d02af5d0..7e1eeb5254c2ce32ced2abdb43d1733ee1a45cd5 100644 (file)
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -210,6 +210,11 @@ extern tree arm_fp16_type_node;
 /* FPU supports ARMv8.1 Adv.SIMD extensions.  */
 #define TARGET_NEON_RDMA (TARGET_NEON && arm_arch8_1)
 
+/* Supports for Dot Product AdvSIMD extensions.  */
+#define TARGET_DOTPROD (TARGET_NEON                                    \
+                       && bitmap_bit_p (arm_active_target.isa,         \
+                                       isa_bit_dotprod))
+
 /* FPU supports the floating point FP16 instructions for ARMv8.2 and later.  */
 #define TARGET_VFP_FP16INST \
   (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP5 && arm_fp16_inst)

diff --git a/gcc/config/arm/t-multilib b/gcc/config/arm/t-multilib
index ec4b76dbc8fc56093c2b27c95e0947558496fe5a..47f3673160a766c5b1b8972f7670355f2c357b56 100644 (file)
--- a/gcc/config/arm/t-multilib
+++ b/gcc/config/arm/t-multilib
@@ -68,7 +68,7 @@ v7ve_vfpv4_simd_variants := +simd
 v8_a_nosimd_variants   := +crc
 v8_a_simd_variants     := $(call all_feat_combs, simd crypto)
 v8_1_a_simd_variants   := $(call all_feat_combs, simd crypto)
-v8_2_a_simd_variants   := $(call all_feat_combs, simd fp16 crypto)
+v8_2_a_simd_variants   := $(call all_feat_combs, simd fp16 crypto dotprod)
 
 
 ifneq (,$(HAS_APROFILE))

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 4e7dfb33c310ef30ebf904bce8f66ef994b41da2..4faeb457b19d3f376dd6f9f9130dffc60682c43b 100644 (file)
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -15622,6 +15622,9 @@ The ARMv8.1 Advanced SIMD and floating-point instructions.
 The cryptographic instructions.  This also enables the Advanced SIMD and
 floating-point instructions.
 
+@item +dotprod
+Enable the Dot Product extension.  This also enables Advanced SIMD instructions.
+
 @item +nocrypto
 Disable the cryptographic extension.